/* * Copyright (C) 2011-2018 Intel Corporation. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * */ #include "enclave.h" #include "enclave_creator_hw.h" #include "edmm_utility.h" #include "se_trace.h" #include "se_page_attr.h" #include "isgx_user.h" #include "sig_handler.h" #include "se_error_internal.h" #include "se_memcpy.h" #include "se_atomic.h" #include "se_detect.h" #include "cpuid.h" #include "rts.h" #include #include #include #include #include #define POINTER_TO_U64(A) ((__u64)((uintptr_t)(A))) static EnclaveCreatorHW g_enclave_creator_hw; EnclaveCreator* g_enclave_creator = &g_enclave_creator_hw; static uint64_t g_eid = 0x1; EnclaveCreatorHW::EnclaveCreatorHW(): m_hdevice(-1), m_sig_registered(false), m_in_kernel_driver(false) { se_mutex_init(&m_sig_mutex); } EnclaveCreatorHW::~EnclaveCreatorHW() { close_se_device(); } int EnclaveCreatorHW::error_driver2urts(int driver_error) { int ret = SGX_ERROR_UNEXPECTED; switch(driver_error) { case SGX_INVALID_ATTRIBUTE: ret = SGX_ERROR_INVALID_ATTRIBUTE; break; case SGX_INVALID_MEASUREMENT: ret = SE_ERROR_INVALID_MEASUREMENT; break; case SGX_INVALID_SIG_STRUCT: case SGX_INVALID_SIGNATURE: ret = SGX_ERROR_INVALID_SIGNATURE; break; case SGX_INVALID_LICENSE: ret = SE_ERROR_INVALID_LAUNCH_TOKEN; break; case SGX_INVALID_CPUSVN: ret = SGX_ERROR_INVALID_CPUSVN; break; case SGX_INVALID_ISVSVN: ret = SGX_ERROR_INVALID_ISVSVN; break; case SGX_UNMASKED_EVENT: ret = SGX_ERROR_DEVICE_BUSY; break; case (int)SGX_POWER_LOST_ENCLAVE: // [-Wc++11-narrowing] ret = SGX_ERROR_ENCLAVE_LOST; break; case (int)SGX_LE_ROLLBACK: ret = SE_ERROR_INVALID_ISVSVNLE; break; default: SE_TRACE(SE_TRACE_WARNING, "unexpected error %#x from driver, should be uRTS/driver bug\n", driver_error); ret = SGX_ERROR_UNEXPECTED; break; } return ret; } int EnclaveCreatorHW::create_enclave(secs_t *secs, sgx_enclave_id_t *enclave_id, void **start_addr, bool ae) { assert(secs != NULL && enclave_id != NULL && start_addr != NULL); UNUSED(ae); if (false == open_se_device()) return SGX_ERROR_NO_DEVICE; SE_TRACE(SE_TRACE_DEBUG, "\n secs.attibutes.flags = %llx, secs.attributes.xfrm = %llx \n" , secs->attributes.flags, secs->attributes.xfrm); //SECS:BASEADDR must be naturally aligned on an SECS.SIZE boundary //This alignment is guaranteed by driver void* enclave_base = mmap(NULL, (size_t)secs->size, PROT_NONE, MAP_SHARED, m_hdevice, 0); if(enclave_base == MAP_FAILED) { SE_TRACE(SE_TRACE_WARNING, "\ncreate enclave: mmap failed, errno = %d\n", errno); return SGX_ERROR_OUT_OF_MEMORY; } secs->base = enclave_base; struct sgx_enclave_create param = {0}; param.src = POINTER_TO_U64(secs); int ret = ioctl(m_hdevice, SGX_IOC_ENCLAVE_CREATE, ¶m); if(ret) { if(ret == -1 && errno == EINTR) { return SGX_INTERNAL_ERROR_ENCLAVE_CREATE_INTERRUPTED; // Allow users to retry } SE_TRACE(SE_TRACE_WARNING, "\nSGX_IOC_ENCLAVE_CREATE failed: errno = %d\n", errno); return error_driver2urts(ret); } *enclave_id = se_atomic_inc64(&g_eid); *start_addr = secs->base; return SGX_SUCCESS; } int EnclaveCreatorHW::add_enclave_page(sgx_enclave_id_t enclave_id, void *src, uint64_t rva, const sec_info_t &sinfo, uint32_t attr) { assert((rva & ((1<(&color_page); } int ret = 0; struct sgx_enclave_add_page addp = { 0, 0, 0, 0 }; addp.addr = enclave_id + rva; addp.src = POINTER_TO_U64(source); addp.secinfo = POINTER_TO_U64(const_cast(&sinfo)); if(((1<get_enclave(enclave_id); if (enclave == NULL) return false; cpu_edmm = is_cpu_support_edmm(); driver_supported = is_driver_compatible(); //return value of get_enclave_version() considers the version of uRTS and enclave metadata supported = use_se_hw() && cpu_edmm && driver_supported && (enclave->get_enclave_version() >= SDK_VERSION_2_0); return supported; } bool EnclaveCreatorHW::is_driver_compatible() { open_se_device(); return is_driver_support_edmm(m_hdevice); } bool EnclaveCreatorHW::is_in_kernel_driver() { open_se_device(); return m_in_kernel_driver; }