bn_mul.h 34 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885
  1. /**
  2. * \file bn_mul.h
  3. *
  4. * \brief Multi-precision integer library
  5. *
  6. * Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
  7. * SPDX-License-Identifier: Apache-2.0
  8. *
  9. * Licensed under the Apache License, Version 2.0 (the "License"); you may
  10. * not use this file except in compliance with the License.
  11. * You may obtain a copy of the License at
  12. *
  13. * http://www.apache.org/licenses/LICENSE-2.0
  14. *
  15. * Unless required by applicable law or agreed to in writing, software
  16. * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
  17. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  18. * See the License for the specific language governing permissions and
  19. * limitations under the License.
  20. *
  21. * This file is part of mbed TLS (https://tls.mbed.org)
  22. */
  23. /*
  24. * Multiply source vector [s] with b, add result
  25. * to destination vector [d] and set carry c.
  26. *
  27. * Currently supports:
  28. *
  29. * . IA-32 (386+) . AMD64 / EM64T
  30. * . IA-32 (SSE2) . Motorola 68000
  31. * . PowerPC, 32-bit . MicroBlaze
  32. * . PowerPC, 64-bit . TriCore
  33. * . SPARC v8 . ARM v3+
  34. * . Alpha . MIPS32
  35. * . C, longlong . C, generic
  36. */
  37. #ifndef MBEDTLS_BN_MUL_H
  38. #define MBEDTLS_BN_MUL_H
  39. #include "bignum.h"
  40. #if defined(MBEDTLS_HAVE_ASM)
  41. #ifndef asm
  42. #define asm __asm
  43. #endif
  44. /* armcc5 --gnu defines __GNUC__ but doesn't support GNU's extended asm */
  45. #if defined(__GNUC__) && \
  46. ( !defined(__ARMCC_VERSION) || __ARMCC_VERSION >= 6000000 )
  47. #if defined(__i386__)
  48. #define MULADDC_INIT \
  49. asm( \
  50. "movl %%ebx, %0 \n\t" \
  51. "movl %5, %%esi \n\t" \
  52. "movl %6, %%edi \n\t" \
  53. "movl %7, %%ecx \n\t" \
  54. "movl %8, %%ebx \n\t"
  55. #define MULADDC_CORE \
  56. "lodsl \n\t" \
  57. "mull %%ebx \n\t" \
  58. "addl %%ecx, %%eax \n\t" \
  59. "adcl $0, %%edx \n\t" \
  60. "addl (%%edi), %%eax \n\t" \
  61. "adcl $0, %%edx \n\t" \
  62. "movl %%edx, %%ecx \n\t" \
  63. "stosl \n\t"
  64. #if defined(MBEDTLS_HAVE_SSE2)
  65. #define MULADDC_HUIT \
  66. "movd %%ecx, %%mm1 \n\t" \
  67. "movd %%ebx, %%mm0 \n\t" \
  68. "movd (%%edi), %%mm3 \n\t" \
  69. "paddq %%mm3, %%mm1 \n\t" \
  70. "movd (%%esi), %%mm2 \n\t" \
  71. "pmuludq %%mm0, %%mm2 \n\t" \
  72. "movd 4(%%esi), %%mm4 \n\t" \
  73. "pmuludq %%mm0, %%mm4 \n\t" \
  74. "movd 8(%%esi), %%mm6 \n\t" \
  75. "pmuludq %%mm0, %%mm6 \n\t" \
  76. "movd 12(%%esi), %%mm7 \n\t" \
  77. "pmuludq %%mm0, %%mm7 \n\t" \
  78. "paddq %%mm2, %%mm1 \n\t" \
  79. "movd 4(%%edi), %%mm3 \n\t" \
  80. "paddq %%mm4, %%mm3 \n\t" \
  81. "movd 8(%%edi), %%mm5 \n\t" \
  82. "paddq %%mm6, %%mm5 \n\t" \
  83. "movd 12(%%edi), %%mm4 \n\t" \
  84. "paddq %%mm4, %%mm7 \n\t" \
  85. "movd %%mm1, (%%edi) \n\t" \
  86. "movd 16(%%esi), %%mm2 \n\t" \
  87. "pmuludq %%mm0, %%mm2 \n\t" \
  88. "psrlq $32, %%mm1 \n\t" \
  89. "movd 20(%%esi), %%mm4 \n\t" \
  90. "pmuludq %%mm0, %%mm4 \n\t" \
  91. "paddq %%mm3, %%mm1 \n\t" \
  92. "movd 24(%%esi), %%mm6 \n\t" \
  93. "pmuludq %%mm0, %%mm6 \n\t" \
  94. "movd %%mm1, 4(%%edi) \n\t" \
  95. "psrlq $32, %%mm1 \n\t" \
  96. "movd 28(%%esi), %%mm3 \n\t" \
  97. "pmuludq %%mm0, %%mm3 \n\t" \
  98. "paddq %%mm5, %%mm1 \n\t" \
  99. "movd 16(%%edi), %%mm5 \n\t" \
  100. "paddq %%mm5, %%mm2 \n\t" \
  101. "movd %%mm1, 8(%%edi) \n\t" \
  102. "psrlq $32, %%mm1 \n\t" \
  103. "paddq %%mm7, %%mm1 \n\t" \
  104. "movd 20(%%edi), %%mm5 \n\t" \
  105. "paddq %%mm5, %%mm4 \n\t" \
  106. "movd %%mm1, 12(%%edi) \n\t" \
  107. "psrlq $32, %%mm1 \n\t" \
  108. "paddq %%mm2, %%mm1 \n\t" \
  109. "movd 24(%%edi), %%mm5 \n\t" \
  110. "paddq %%mm5, %%mm6 \n\t" \
  111. "movd %%mm1, 16(%%edi) \n\t" \
  112. "psrlq $32, %%mm1 \n\t" \
  113. "paddq %%mm4, %%mm1 \n\t" \
  114. "movd 28(%%edi), %%mm5 \n\t" \
  115. "paddq %%mm5, %%mm3 \n\t" \
  116. "movd %%mm1, 20(%%edi) \n\t" \
  117. "psrlq $32, %%mm1 \n\t" \
  118. "paddq %%mm6, %%mm1 \n\t" \
  119. "movd %%mm1, 24(%%edi) \n\t" \
  120. "psrlq $32, %%mm1 \n\t" \
  121. "paddq %%mm3, %%mm1 \n\t" \
  122. "movd %%mm1, 28(%%edi) \n\t" \
  123. "addl $32, %%edi \n\t" \
  124. "addl $32, %%esi \n\t" \
  125. "psrlq $32, %%mm1 \n\t" \
  126. "movd %%mm1, %%ecx \n\t"
  127. #define MULADDC_STOP \
  128. "emms \n\t" \
  129. "movl %4, %%ebx \n\t" \
  130. "movl %%ecx, %1 \n\t" \
  131. "movl %%edi, %2 \n\t" \
  132. "movl %%esi, %3 \n\t" \
  133. : "=m" (t), "=m" (c), "=m" (d), "=m" (s) \
  134. : "m" (t), "m" (s), "m" (d), "m" (c), "m" (b) \
  135. : "eax", "ecx", "edx", "esi", "edi" \
  136. );
  137. #else
  138. #define MULADDC_STOP \
  139. "movl %4, %%ebx \n\t" \
  140. "movl %%ecx, %1 \n\t" \
  141. "movl %%edi, %2 \n\t" \
  142. "movl %%esi, %3 \n\t" \
  143. : "=m" (t), "=m" (c), "=m" (d), "=m" (s) \
  144. : "m" (t), "m" (s), "m" (d), "m" (c), "m" (b) \
  145. : "eax", "ecx", "edx", "esi", "edi" \
  146. );
  147. #endif /* SSE2 */
  148. #endif /* i386 */
  149. #if defined(__amd64__) || defined (__x86_64__)
  150. #define MULADDC_INIT \
  151. asm( \
  152. "xorq %%r8, %%r8 \n\t"
  153. #define MULADDC_CORE \
  154. "movq (%%rsi), %%rax \n\t" \
  155. "mulq %%rbx \n\t" \
  156. "addq $8, %%rsi \n\t" \
  157. "addq %%rcx, %%rax \n\t" \
  158. "movq %%r8, %%rcx \n\t" \
  159. "adcq $0, %%rdx \n\t" \
  160. "nop \n\t" \
  161. "addq %%rax, (%%rdi) \n\t" \
  162. "adcq %%rdx, %%rcx \n\t" \
  163. "addq $8, %%rdi \n\t"
  164. #define MULADDC_STOP \
  165. : "+c" (c), "+D" (d), "+S" (s) \
  166. : "b" (b) \
  167. : "rax", "rdx", "r8" \
  168. );
  169. #endif /* AMD64 */
  170. #if defined(__mc68020__) || defined(__mcpu32__)
  171. #define MULADDC_INIT \
  172. asm( \
  173. "movl %3, %%a2 \n\t" \
  174. "movl %4, %%a3 \n\t" \
  175. "movl %5, %%d3 \n\t" \
  176. "movl %6, %%d2 \n\t" \
  177. "moveq #0, %%d0 \n\t"
  178. #define MULADDC_CORE \
  179. "movel %%a2@+, %%d1 \n\t" \
  180. "mulul %%d2, %%d4:%%d1 \n\t" \
  181. "addl %%d3, %%d1 \n\t" \
  182. "addxl %%d0, %%d4 \n\t" \
  183. "moveq #0, %%d3 \n\t" \
  184. "addl %%d1, %%a3@+ \n\t" \
  185. "addxl %%d4, %%d3 \n\t"
  186. #define MULADDC_STOP \
  187. "movl %%d3, %0 \n\t" \
  188. "movl %%a3, %1 \n\t" \
  189. "movl %%a2, %2 \n\t" \
  190. : "=m" (c), "=m" (d), "=m" (s) \
  191. : "m" (s), "m" (d), "m" (c), "m" (b) \
  192. : "d0", "d1", "d2", "d3", "d4", "a2", "a3" \
  193. );
  194. #define MULADDC_HUIT \
  195. "movel %%a2@+, %%d1 \n\t" \
  196. "mulul %%d2, %%d4:%%d1 \n\t" \
  197. "addxl %%d3, %%d1 \n\t" \
  198. "addxl %%d0, %%d4 \n\t" \
  199. "addl %%d1, %%a3@+ \n\t" \
  200. "movel %%a2@+, %%d1 \n\t" \
  201. "mulul %%d2, %%d3:%%d1 \n\t" \
  202. "addxl %%d4, %%d1 \n\t" \
  203. "addxl %%d0, %%d3 \n\t" \
  204. "addl %%d1, %%a3@+ \n\t" \
  205. "movel %%a2@+, %%d1 \n\t" \
  206. "mulul %%d2, %%d4:%%d1 \n\t" \
  207. "addxl %%d3, %%d1 \n\t" \
  208. "addxl %%d0, %%d4 \n\t" \
  209. "addl %%d1, %%a3@+ \n\t" \
  210. "movel %%a2@+, %%d1 \n\t" \
  211. "mulul %%d2, %%d3:%%d1 \n\t" \
  212. "addxl %%d4, %%d1 \n\t" \
  213. "addxl %%d0, %%d3 \n\t" \
  214. "addl %%d1, %%a3@+ \n\t" \
  215. "movel %%a2@+, %%d1 \n\t" \
  216. "mulul %%d2, %%d4:%%d1 \n\t" \
  217. "addxl %%d3, %%d1 \n\t" \
  218. "addxl %%d0, %%d4 \n\t" \
  219. "addl %%d1, %%a3@+ \n\t" \
  220. "movel %%a2@+, %%d1 \n\t" \
  221. "mulul %%d2, %%d3:%%d1 \n\t" \
  222. "addxl %%d4, %%d1 \n\t" \
  223. "addxl %%d0, %%d3 \n\t" \
  224. "addl %%d1, %%a3@+ \n\t" \
  225. "movel %%a2@+, %%d1 \n\t" \
  226. "mulul %%d2, %%d4:%%d1 \n\t" \
  227. "addxl %%d3, %%d1 \n\t" \
  228. "addxl %%d0, %%d4 \n\t" \
  229. "addl %%d1, %%a3@+ \n\t" \
  230. "movel %%a2@+, %%d1 \n\t" \
  231. "mulul %%d2, %%d3:%%d1 \n\t" \
  232. "addxl %%d4, %%d1 \n\t" \
  233. "addxl %%d0, %%d3 \n\t" \
  234. "addl %%d1, %%a3@+ \n\t" \
  235. "addxl %%d0, %%d3 \n\t"
  236. #endif /* MC68000 */
  237. #if defined(__powerpc64__) || defined(__ppc64__)
  238. #if defined(__MACH__) && defined(__APPLE__)
  239. #define MULADDC_INIT \
  240. asm( \
  241. "ld r3, %3 \n\t" \
  242. "ld r4, %4 \n\t" \
  243. "ld r5, %5 \n\t" \
  244. "ld r6, %6 \n\t" \
  245. "addi r3, r3, -8 \n\t" \
  246. "addi r4, r4, -8 \n\t" \
  247. "addic r5, r5, 0 \n\t"
  248. #define MULADDC_CORE \
  249. "ldu r7, 8(r3) \n\t" \
  250. "mulld r8, r7, r6 \n\t" \
  251. "mulhdu r9, r7, r6 \n\t" \
  252. "adde r8, r8, r5 \n\t" \
  253. "ld r7, 8(r4) \n\t" \
  254. "addze r5, r9 \n\t" \
  255. "addc r8, r8, r7 \n\t" \
  256. "stdu r8, 8(r4) \n\t"
  257. #define MULADDC_STOP \
  258. "addze r5, r5 \n\t" \
  259. "addi r4, r4, 8 \n\t" \
  260. "addi r3, r3, 8 \n\t" \
  261. "std r5, %0 \n\t" \
  262. "std r4, %1 \n\t" \
  263. "std r3, %2 \n\t" \
  264. : "=m" (c), "=m" (d), "=m" (s) \
  265. : "m" (s), "m" (d), "m" (c), "m" (b) \
  266. : "r3", "r4", "r5", "r6", "r7", "r8", "r9" \
  267. );
  268. #else /* __MACH__ && __APPLE__ */
  269. #define MULADDC_INIT \
  270. asm( \
  271. "ld %%r3, %3 \n\t" \
  272. "ld %%r4, %4 \n\t" \
  273. "ld %%r5, %5 \n\t" \
  274. "ld %%r6, %6 \n\t" \
  275. "addi %%r3, %%r3, -8 \n\t" \
  276. "addi %%r4, %%r4, -8 \n\t" \
  277. "addic %%r5, %%r5, 0 \n\t"
  278. #define MULADDC_CORE \
  279. "ldu %%r7, 8(%%r3) \n\t" \
  280. "mulld %%r8, %%r7, %%r6 \n\t" \
  281. "mulhdu %%r9, %%r7, %%r6 \n\t" \
  282. "adde %%r8, %%r8, %%r5 \n\t" \
  283. "ld %%r7, 8(%%r4) \n\t" \
  284. "addze %%r5, %%r9 \n\t" \
  285. "addc %%r8, %%r8, %%r7 \n\t" \
  286. "stdu %%r8, 8(%%r4) \n\t"
  287. #define MULADDC_STOP \
  288. "addze %%r5, %%r5 \n\t" \
  289. "addi %%r4, %%r4, 8 \n\t" \
  290. "addi %%r3, %%r3, 8 \n\t" \
  291. "std %%r5, %0 \n\t" \
  292. "std %%r4, %1 \n\t" \
  293. "std %%r3, %2 \n\t" \
  294. : "=m" (c), "=m" (d), "=m" (s) \
  295. : "m" (s), "m" (d), "m" (c), "m" (b) \
  296. : "r3", "r4", "r5", "r6", "r7", "r8", "r9" \
  297. );
  298. #endif /* __MACH__ && __APPLE__ */
  299. #elif defined(__powerpc__) || defined(__ppc__) /* end PPC64/begin PPC32 */
  300. #if defined(__MACH__) && defined(__APPLE__)
  301. #define MULADDC_INIT \
  302. asm( \
  303. "lwz r3, %3 \n\t" \
  304. "lwz r4, %4 \n\t" \
  305. "lwz r5, %5 \n\t" \
  306. "lwz r6, %6 \n\t" \
  307. "addi r3, r3, -4 \n\t" \
  308. "addi r4, r4, -4 \n\t" \
  309. "addic r5, r5, 0 \n\t"
  310. #define MULADDC_CORE \
  311. "lwzu r7, 4(r3) \n\t" \
  312. "mullw r8, r7, r6 \n\t" \
  313. "mulhwu r9, r7, r6 \n\t" \
  314. "adde r8, r8, r5 \n\t" \
  315. "lwz r7, 4(r4) \n\t" \
  316. "addze r5, r9 \n\t" \
  317. "addc r8, r8, r7 \n\t" \
  318. "stwu r8, 4(r4) \n\t"
  319. #define MULADDC_STOP \
  320. "addze r5, r5 \n\t" \
  321. "addi r4, r4, 4 \n\t" \
  322. "addi r3, r3, 4 \n\t" \
  323. "stw r5, %0 \n\t" \
  324. "stw r4, %1 \n\t" \
  325. "stw r3, %2 \n\t" \
  326. : "=m" (c), "=m" (d), "=m" (s) \
  327. : "m" (s), "m" (d), "m" (c), "m" (b) \
  328. : "r3", "r4", "r5", "r6", "r7", "r8", "r9" \
  329. );
  330. #else /* __MACH__ && __APPLE__ */
  331. #define MULADDC_INIT \
  332. asm( \
  333. "lwz %%r3, %3 \n\t" \
  334. "lwz %%r4, %4 \n\t" \
  335. "lwz %%r5, %5 \n\t" \
  336. "lwz %%r6, %6 \n\t" \
  337. "addi %%r3, %%r3, -4 \n\t" \
  338. "addi %%r4, %%r4, -4 \n\t" \
  339. "addic %%r5, %%r5, 0 \n\t"
  340. #define MULADDC_CORE \
  341. "lwzu %%r7, 4(%%r3) \n\t" \
  342. "mullw %%r8, %%r7, %%r6 \n\t" \
  343. "mulhwu %%r9, %%r7, %%r6 \n\t" \
  344. "adde %%r8, %%r8, %%r5 \n\t" \
  345. "lwz %%r7, 4(%%r4) \n\t" \
  346. "addze %%r5, %%r9 \n\t" \
  347. "addc %%r8, %%r8, %%r7 \n\t" \
  348. "stwu %%r8, 4(%%r4) \n\t"
  349. #define MULADDC_STOP \
  350. "addze %%r5, %%r5 \n\t" \
  351. "addi %%r4, %%r4, 4 \n\t" \
  352. "addi %%r3, %%r3, 4 \n\t" \
  353. "stw %%r5, %0 \n\t" \
  354. "stw %%r4, %1 \n\t" \
  355. "stw %%r3, %2 \n\t" \
  356. : "=m" (c), "=m" (d), "=m" (s) \
  357. : "m" (s), "m" (d), "m" (c), "m" (b) \
  358. : "r3", "r4", "r5", "r6", "r7", "r8", "r9" \
  359. );
  360. #endif /* __MACH__ && __APPLE__ */
  361. #endif /* PPC32 */
  362. /*
  363. * The Sparc(64) assembly is reported to be broken.
  364. * Disable it for now, until we're able to fix it.
  365. */
  366. #if 0 && defined(__sparc__)
  367. #if defined(__sparc64__)
  368. #define MULADDC_INIT \
  369. asm( \
  370. "ldx %3, %%o0 \n\t" \
  371. "ldx %4, %%o1 \n\t" \
  372. "ld %5, %%o2 \n\t" \
  373. "ld %6, %%o3 \n\t"
  374. #define MULADDC_CORE \
  375. "ld [%%o0], %%o4 \n\t" \
  376. "inc 4, %%o0 \n\t" \
  377. "ld [%%o1], %%o5 \n\t" \
  378. "umul %%o3, %%o4, %%o4 \n\t" \
  379. "addcc %%o4, %%o2, %%o4 \n\t" \
  380. "rd %%y, %%g1 \n\t" \
  381. "addx %%g1, 0, %%g1 \n\t" \
  382. "addcc %%o4, %%o5, %%o4 \n\t" \
  383. "st %%o4, [%%o1] \n\t" \
  384. "addx %%g1, 0, %%o2 \n\t" \
  385. "inc 4, %%o1 \n\t"
  386. #define MULADDC_STOP \
  387. "st %%o2, %0 \n\t" \
  388. "stx %%o1, %1 \n\t" \
  389. "stx %%o0, %2 \n\t" \
  390. : "=m" (c), "=m" (d), "=m" (s) \
  391. : "m" (s), "m" (d), "m" (c), "m" (b) \
  392. : "g1", "o0", "o1", "o2", "o3", "o4", \
  393. "o5" \
  394. );
  395. #else /* __sparc64__ */
  396. #define MULADDC_INIT \
  397. asm( \
  398. "ld %3, %%o0 \n\t" \
  399. "ld %4, %%o1 \n\t" \
  400. "ld %5, %%o2 \n\t" \
  401. "ld %6, %%o3 \n\t"
  402. #define MULADDC_CORE \
  403. "ld [%%o0], %%o4 \n\t" \
  404. "inc 4, %%o0 \n\t" \
  405. "ld [%%o1], %%o5 \n\t" \
  406. "umul %%o3, %%o4, %%o4 \n\t" \
  407. "addcc %%o4, %%o2, %%o4 \n\t" \
  408. "rd %%y, %%g1 \n\t" \
  409. "addx %%g1, 0, %%g1 \n\t" \
  410. "addcc %%o4, %%o5, %%o4 \n\t" \
  411. "st %%o4, [%%o1] \n\t" \
  412. "addx %%g1, 0, %%o2 \n\t" \
  413. "inc 4, %%o1 \n\t"
  414. #define MULADDC_STOP \
  415. "st %%o2, %0 \n\t" \
  416. "st %%o1, %1 \n\t" \
  417. "st %%o0, %2 \n\t" \
  418. : "=m" (c), "=m" (d), "=m" (s) \
  419. : "m" (s), "m" (d), "m" (c), "m" (b) \
  420. : "g1", "o0", "o1", "o2", "o3", "o4", \
  421. "o5" \
  422. );
  423. #endif /* __sparc64__ */
  424. #endif /* __sparc__ */
  425. #if defined(__microblaze__) || defined(microblaze)
  426. #define MULADDC_INIT \
  427. asm( \
  428. "lwi r3, %3 \n\t" \
  429. "lwi r4, %4 \n\t" \
  430. "lwi r5, %5 \n\t" \
  431. "lwi r6, %6 \n\t" \
  432. "andi r7, r6, 0xffff \n\t" \
  433. "bsrli r6, r6, 16 \n\t"
  434. #define MULADDC_CORE \
  435. "lhui r8, r3, 0 \n\t" \
  436. "addi r3, r3, 2 \n\t" \
  437. "lhui r9, r3, 0 \n\t" \
  438. "addi r3, r3, 2 \n\t" \
  439. "mul r10, r9, r6 \n\t" \
  440. "mul r11, r8, r7 \n\t" \
  441. "mul r12, r9, r7 \n\t" \
  442. "mul r13, r8, r6 \n\t" \
  443. "bsrli r8, r10, 16 \n\t" \
  444. "bsrli r9, r11, 16 \n\t" \
  445. "add r13, r13, r8 \n\t" \
  446. "add r13, r13, r9 \n\t" \
  447. "bslli r10, r10, 16 \n\t" \
  448. "bslli r11, r11, 16 \n\t" \
  449. "add r12, r12, r10 \n\t" \
  450. "addc r13, r13, r0 \n\t" \
  451. "add r12, r12, r11 \n\t" \
  452. "addc r13, r13, r0 \n\t" \
  453. "lwi r10, r4, 0 \n\t" \
  454. "add r12, r12, r10 \n\t" \
  455. "addc r13, r13, r0 \n\t" \
  456. "add r12, r12, r5 \n\t" \
  457. "addc r5, r13, r0 \n\t" \
  458. "swi r12, r4, 0 \n\t" \
  459. "addi r4, r4, 4 \n\t"
  460. #define MULADDC_STOP \
  461. "swi r5, %0 \n\t" \
  462. "swi r4, %1 \n\t" \
  463. "swi r3, %2 \n\t" \
  464. : "=m" (c), "=m" (d), "=m" (s) \
  465. : "m" (s), "m" (d), "m" (c), "m" (b) \
  466. : "r3", "r4" "r5", "r6", "r7", "r8", \
  467. "r9", "r10", "r11", "r12", "r13" \
  468. );
  469. #endif /* MicroBlaze */
  470. #if defined(__tricore__)
  471. #define MULADDC_INIT \
  472. asm( \
  473. "ld.a %%a2, %3 \n\t" \
  474. "ld.a %%a3, %4 \n\t" \
  475. "ld.w %%d4, %5 \n\t" \
  476. "ld.w %%d1, %6 \n\t" \
  477. "xor %%d5, %%d5 \n\t"
  478. #define MULADDC_CORE \
  479. "ld.w %%d0, [%%a2+] \n\t" \
  480. "madd.u %%e2, %%e4, %%d0, %%d1 \n\t" \
  481. "ld.w %%d0, [%%a3] \n\t" \
  482. "addx %%d2, %%d2, %%d0 \n\t" \
  483. "addc %%d3, %%d3, 0 \n\t" \
  484. "mov %%d4, %%d3 \n\t" \
  485. "st.w [%%a3+], %%d2 \n\t"
  486. #define MULADDC_STOP \
  487. "st.w %0, %%d4 \n\t" \
  488. "st.a %1, %%a3 \n\t" \
  489. "st.a %2, %%a2 \n\t" \
  490. : "=m" (c), "=m" (d), "=m" (s) \
  491. : "m" (s), "m" (d), "m" (c), "m" (b) \
  492. : "d0", "d1", "e2", "d4", "a2", "a3" \
  493. );
  494. #endif /* TriCore */
  495. /*
  496. * gcc -O0 by default uses r7 for the frame pointer, so it complains about our
  497. * use of r7 below, unless -fomit-frame-pointer is passed. Unfortunately,
  498. * passing that option is not easy when building with yotta.
  499. *
  500. * On the other hand, -fomit-frame-pointer is implied by any -Ox options with
  501. * x !=0, which we can detect using __OPTIMIZE__ (which is also defined by
  502. * clang and armcc5 under the same conditions).
  503. *
  504. * So, only use the optimized assembly below for optimized build, which avoids
  505. * the build error and is pretty reasonable anyway.
  506. */
  507. #if defined(__GNUC__) && !defined(__OPTIMIZE__)
  508. #define MULADDC_CANNOT_USE_R7
  509. #endif
  510. #if defined(__arm__) && !defined(MULADDC_CANNOT_USE_R7)
  511. #if defined(__thumb__) && !defined(__thumb2__)
  512. #define MULADDC_INIT \
  513. asm( \
  514. "ldr r0, %3 \n\t" \
  515. "ldr r1, %4 \n\t" \
  516. "ldr r2, %5 \n\t" \
  517. "ldr r3, %6 \n\t" \
  518. "lsr r7, r3, #16 \n\t" \
  519. "mov r9, r7 \n\t" \
  520. "lsl r7, r3, #16 \n\t" \
  521. "lsr r7, r7, #16 \n\t" \
  522. "mov r8, r7 \n\t"
  523. #define MULADDC_CORE \
  524. "ldmia r0!, {r6} \n\t" \
  525. "lsr r7, r6, #16 \n\t" \
  526. "lsl r6, r6, #16 \n\t" \
  527. "lsr r6, r6, #16 \n\t" \
  528. "mov r4, r8 \n\t" \
  529. "mul r4, r6 \n\t" \
  530. "mov r3, r9 \n\t" \
  531. "mul r6, r3 \n\t" \
  532. "mov r5, r9 \n\t" \
  533. "mul r5, r7 \n\t" \
  534. "mov r3, r8 \n\t" \
  535. "mul r7, r3 \n\t" \
  536. "lsr r3, r6, #16 \n\t" \
  537. "add r5, r5, r3 \n\t" \
  538. "lsr r3, r7, #16 \n\t" \
  539. "add r5, r5, r3 \n\t" \
  540. "add r4, r4, r2 \n\t" \
  541. "mov r2, #0 \n\t" \
  542. "adc r5, r2 \n\t" \
  543. "lsl r3, r6, #16 \n\t" \
  544. "add r4, r4, r3 \n\t" \
  545. "adc r5, r2 \n\t" \
  546. "lsl r3, r7, #16 \n\t" \
  547. "add r4, r4, r3 \n\t" \
  548. "adc r5, r2 \n\t" \
  549. "ldr r3, [r1] \n\t" \
  550. "add r4, r4, r3 \n\t" \
  551. "adc r2, r5 \n\t" \
  552. "stmia r1!, {r4} \n\t"
  553. #define MULADDC_STOP \
  554. "str r2, %0 \n\t" \
  555. "str r1, %1 \n\t" \
  556. "str r0, %2 \n\t" \
  557. : "=m" (c), "=m" (d), "=m" (s) \
  558. : "m" (s), "m" (d), "m" (c), "m" (b) \
  559. : "r0", "r1", "r2", "r3", "r4", "r5", \
  560. "r6", "r7", "r8", "r9", "cc" \
  561. );
  562. #else
  563. #define MULADDC_INIT \
  564. asm( \
  565. "ldr r0, %3 \n\t" \
  566. "ldr r1, %4 \n\t" \
  567. "ldr r2, %5 \n\t" \
  568. "ldr r3, %6 \n\t"
  569. #define MULADDC_CORE \
  570. "ldr r4, [r0], #4 \n\t" \
  571. "mov r5, #0 \n\t" \
  572. "ldr r6, [r1] \n\t" \
  573. "umlal r2, r5, r3, r4 \n\t" \
  574. "adds r7, r6, r2 \n\t" \
  575. "adc r2, r5, #0 \n\t" \
  576. "str r7, [r1], #4 \n\t"
  577. #define MULADDC_STOP \
  578. "str r2, %0 \n\t" \
  579. "str r1, %1 \n\t" \
  580. "str r0, %2 \n\t" \
  581. : "=m" (c), "=m" (d), "=m" (s) \
  582. : "m" (s), "m" (d), "m" (c), "m" (b) \
  583. : "r0", "r1", "r2", "r3", "r4", "r5", \
  584. "r6", "r7", "cc" \
  585. );
  586. #endif /* Thumb */
  587. #endif /* ARMv3 */
  588. #if defined(__alpha__)
  589. #define MULADDC_INIT \
  590. asm( \
  591. "ldq $1, %3 \n\t" \
  592. "ldq $2, %4 \n\t" \
  593. "ldq $3, %5 \n\t" \
  594. "ldq $4, %6 \n\t"
  595. #define MULADDC_CORE \
  596. "ldq $6, 0($1) \n\t" \
  597. "addq $1, 8, $1 \n\t" \
  598. "mulq $6, $4, $7 \n\t" \
  599. "umulh $6, $4, $6 \n\t" \
  600. "addq $7, $3, $7 \n\t" \
  601. "cmpult $7, $3, $3 \n\t" \
  602. "ldq $5, 0($2) \n\t" \
  603. "addq $7, $5, $7 \n\t" \
  604. "cmpult $7, $5, $5 \n\t" \
  605. "stq $7, 0($2) \n\t" \
  606. "addq $2, 8, $2 \n\t" \
  607. "addq $6, $3, $3 \n\t" \
  608. "addq $5, $3, $3 \n\t"
  609. #define MULADDC_STOP \
  610. "stq $3, %0 \n\t" \
  611. "stq $2, %1 \n\t" \
  612. "stq $1, %2 \n\t" \
  613. : "=m" (c), "=m" (d), "=m" (s) \
  614. : "m" (s), "m" (d), "m" (c), "m" (b) \
  615. : "$1", "$2", "$3", "$4", "$5", "$6", "$7" \
  616. );
  617. #endif /* Alpha */
  618. #if defined(__mips__) && !defined(__mips64)
  619. #define MULADDC_INIT \
  620. asm( \
  621. "lw $10, %3 \n\t" \
  622. "lw $11, %4 \n\t" \
  623. "lw $12, %5 \n\t" \
  624. "lw $13, %6 \n\t"
  625. #define MULADDC_CORE \
  626. "lw $14, 0($10) \n\t" \
  627. "multu $13, $14 \n\t" \
  628. "addi $10, $10, 4 \n\t" \
  629. "mflo $14 \n\t" \
  630. "mfhi $9 \n\t" \
  631. "addu $14, $12, $14 \n\t" \
  632. "lw $15, 0($11) \n\t" \
  633. "sltu $12, $14, $12 \n\t" \
  634. "addu $15, $14, $15 \n\t" \
  635. "sltu $14, $15, $14 \n\t" \
  636. "addu $12, $12, $9 \n\t" \
  637. "sw $15, 0($11) \n\t" \
  638. "addu $12, $12, $14 \n\t" \
  639. "addi $11, $11, 4 \n\t"
  640. #define MULADDC_STOP \
  641. "sw $12, %0 \n\t" \
  642. "sw $11, %1 \n\t" \
  643. "sw $10, %2 \n\t" \
  644. : "=m" (c), "=m" (d), "=m" (s) \
  645. : "m" (s), "m" (d), "m" (c), "m" (b) \
  646. : "$9", "$10", "$11", "$12", "$13", "$14", "$15" \
  647. );
  648. #endif /* MIPS */
  649. #endif /* GNUC */
  650. #if (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  651. #define MULADDC_INIT \
  652. __asm mov esi, s \
  653. __asm mov edi, d \
  654. __asm mov ecx, c \
  655. __asm mov ebx, b
  656. #define MULADDC_CORE \
  657. __asm lodsd \
  658. __asm mul ebx \
  659. __asm add eax, ecx \
  660. __asm adc edx, 0 \
  661. __asm add eax, [edi] \
  662. __asm adc edx, 0 \
  663. __asm mov ecx, edx \
  664. __asm stosd
  665. #if defined(MBEDTLS_HAVE_SSE2)
  666. #define EMIT __asm _emit
  667. #define MULADDC_HUIT \
  668. EMIT 0x0F EMIT 0x6E EMIT 0xC9 \
  669. EMIT 0x0F EMIT 0x6E EMIT 0xC3 \
  670. EMIT 0x0F EMIT 0x6E EMIT 0x1F \
  671. EMIT 0x0F EMIT 0xD4 EMIT 0xCB \
  672. EMIT 0x0F EMIT 0x6E EMIT 0x16 \
  673. EMIT 0x0F EMIT 0xF4 EMIT 0xD0 \
  674. EMIT 0x0F EMIT 0x6E EMIT 0x66 EMIT 0x04 \
  675. EMIT 0x0F EMIT 0xF4 EMIT 0xE0 \
  676. EMIT 0x0F EMIT 0x6E EMIT 0x76 EMIT 0x08 \
  677. EMIT 0x0F EMIT 0xF4 EMIT 0xF0 \
  678. EMIT 0x0F EMIT 0x6E EMIT 0x7E EMIT 0x0C \
  679. EMIT 0x0F EMIT 0xF4 EMIT 0xF8 \
  680. EMIT 0x0F EMIT 0xD4 EMIT 0xCA \
  681. EMIT 0x0F EMIT 0x6E EMIT 0x5F EMIT 0x04 \
  682. EMIT 0x0F EMIT 0xD4 EMIT 0xDC \
  683. EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x08 \
  684. EMIT 0x0F EMIT 0xD4 EMIT 0xEE \
  685. EMIT 0x0F EMIT 0x6E EMIT 0x67 EMIT 0x0C \
  686. EMIT 0x0F EMIT 0xD4 EMIT 0xFC \
  687. EMIT 0x0F EMIT 0x7E EMIT 0x0F \
  688. EMIT 0x0F EMIT 0x6E EMIT 0x56 EMIT 0x10 \
  689. EMIT 0x0F EMIT 0xF4 EMIT 0xD0 \
  690. EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \
  691. EMIT 0x0F EMIT 0x6E EMIT 0x66 EMIT 0x14 \
  692. EMIT 0x0F EMIT 0xF4 EMIT 0xE0 \
  693. EMIT 0x0F EMIT 0xD4 EMIT 0xCB \
  694. EMIT 0x0F EMIT 0x6E EMIT 0x76 EMIT 0x18 \
  695. EMIT 0x0F EMIT 0xF4 EMIT 0xF0 \
  696. EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x04 \
  697. EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \
  698. EMIT 0x0F EMIT 0x6E EMIT 0x5E EMIT 0x1C \
  699. EMIT 0x0F EMIT 0xF4 EMIT 0xD8 \
  700. EMIT 0x0F EMIT 0xD4 EMIT 0xCD \
  701. EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x10 \
  702. EMIT 0x0F EMIT 0xD4 EMIT 0xD5 \
  703. EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x08 \
  704. EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \
  705. EMIT 0x0F EMIT 0xD4 EMIT 0xCF \
  706. EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x14 \
  707. EMIT 0x0F EMIT 0xD4 EMIT 0xE5 \
  708. EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x0C \
  709. EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \
  710. EMIT 0x0F EMIT 0xD4 EMIT 0xCA \
  711. EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x18 \
  712. EMIT 0x0F EMIT 0xD4 EMIT 0xF5 \
  713. EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x10 \
  714. EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \
  715. EMIT 0x0F EMIT 0xD4 EMIT 0xCC \
  716. EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x1C \
  717. EMIT 0x0F EMIT 0xD4 EMIT 0xDD \
  718. EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x14 \
  719. EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \
  720. EMIT 0x0F EMIT 0xD4 EMIT 0xCE \
  721. EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x18 \
  722. EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \
  723. EMIT 0x0F EMIT 0xD4 EMIT 0xCB \
  724. EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x1C \
  725. EMIT 0x83 EMIT 0xC7 EMIT 0x20 \
  726. EMIT 0x83 EMIT 0xC6 EMIT 0x20 \
  727. EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \
  728. EMIT 0x0F EMIT 0x7E EMIT 0xC9
  729. #define MULADDC_STOP \
  730. EMIT 0x0F EMIT 0x77 \
  731. __asm mov c, ecx \
  732. __asm mov d, edi \
  733. __asm mov s, esi \
  734. #else
  735. #define MULADDC_STOP \
  736. __asm mov c, ecx \
  737. __asm mov d, edi \
  738. __asm mov s, esi \
  739. #endif /* SSE2 */
  740. #endif /* MSVC */
  741. #endif /* MBEDTLS_HAVE_ASM */
  742. #if !defined(MULADDC_CORE)
  743. #if defined(MBEDTLS_HAVE_UDBL)
  744. #define MULADDC_INIT \
  745. { \
  746. mbedtls_t_udbl r; \
  747. mbedtls_mpi_uint r0, r1;
  748. #define MULADDC_CORE \
  749. r = *(s++) * (mbedtls_t_udbl) b; \
  750. r0 = (mbedtls_mpi_uint) r; \
  751. r1 = (mbedtls_mpi_uint)( r >> biL ); \
  752. r0 += c; r1 += (r0 < c); \
  753. r0 += *d; r1 += (r0 < *d); \
  754. c = r1; *(d++) = r0;
  755. #define MULADDC_STOP \
  756. }
  757. #else
  758. #define MULADDC_INIT \
  759. { \
  760. mbedtls_mpi_uint s0, s1, b0, b1; \
  761. mbedtls_mpi_uint r0, r1, rx, ry; \
  762. b0 = ( b << biH ) >> biH; \
  763. b1 = ( b >> biH );
  764. #define MULADDC_CORE \
  765. s0 = ( *s << biH ) >> biH; \
  766. s1 = ( *s >> biH ); s++; \
  767. rx = s0 * b1; r0 = s0 * b0; \
  768. ry = s1 * b0; r1 = s1 * b1; \
  769. r1 += ( rx >> biH ); \
  770. r1 += ( ry >> biH ); \
  771. rx <<= biH; ry <<= biH; \
  772. r0 += rx; r1 += (r0 < rx); \
  773. r0 += ry; r1 += (r0 < ry); \
  774. r0 += c; r1 += (r0 < c); \
  775. r0 += *d; r1 += (r0 < *d); \
  776. c = r1; *(d++) = r0;
  777. #define MULADDC_STOP \
  778. }
  779. #endif /* C (generic) */
  780. #endif /* C (longlong) */
  781. #endif /* bn_mul.h */