db_misc.c 10 KB

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  1. /* Copyright (C) 2014 Stony Brook University
  2. This file is part of Graphene Library OS.
  3. Graphene Library OS is free software: you can redistribute it and/or
  4. modify it under the terms of the GNU Lesser General Public License
  5. as published by the Free Software Foundation, either version 3 of the
  6. License, or (at your option) any later version.
  7. Graphene Library OS is distributed in the hope that it will be useful,
  8. but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. GNU Lesser General Public License for more details.
  11. You should have received a copy of the GNU Lesser General Public License
  12. along with this program. If not, see <http://www.gnu.org/licenses/>. */
  13. /*
  14. * db_misc.c
  15. *
  16. * This file contains APIs for miscellaneous use.
  17. */
  18. #include <asm/fcntl.h>
  19. #include <linux/time.h>
  20. #include "api.h"
  21. #include "pal.h"
  22. #include "pal_debug.h"
  23. #include "pal_defs.h"
  24. #include "pal_error.h"
  25. #include "pal_internal.h"
  26. #include "pal_linux.h"
  27. #include "pal_linux_defs.h"
  28. #include "pal_security.h"
  29. #include "sgx_api.h"
  30. unsigned long _DkSystemTimeQuery(void) {
  31. unsigned long microsec;
  32. int ret = ocall_gettime(&microsec);
  33. if (ret)
  34. return -PAL_ERROR_DENIED;
  35. return microsec;
  36. }
  37. size_t _DkRandomBitsRead(void* buffer, size_t size) {
  38. uint32_t rand;
  39. for (size_t i = 0; i < size; i += sizeof(rand)) {
  40. rand = rdrand();
  41. memcpy(buffer + i, &rand, MIN(sizeof(rand), size - i));
  42. }
  43. return 0;
  44. }
  45. int _DkInstructionCacheFlush(const void* addr, int size) {
  46. __UNUSED(addr);
  47. __UNUSED(size);
  48. return -PAL_ERROR_NOTIMPLEMENTED;
  49. }
  50. int _DkSegmentRegisterSet(int reg, const void* addr) {
  51. /* GS is internally used, denied any access to it */
  52. if (reg != PAL_SEGMENT_FS)
  53. return -PAL_ERROR_DENIED;
  54. SET_ENCLAVE_TLS(fsbase, (void*)addr);
  55. wrfsbase((uint64_t)addr);
  56. return 0;
  57. }
  58. int _DkSegmentRegisterGet(int reg, void** addr) {
  59. /* GS is internally used, denied any access to it */
  60. if (reg != PAL_SEGMENT_FS)
  61. return -PAL_ERROR_DENIED;
  62. *addr = (void*)GET_ENCLAVE_TLS(fsbase);
  63. return 0;
  64. }
  65. #define CPUID_CACHE_SIZE 64
  66. #define CPUID_CACHE_INVALID ((unsigned int)-1)
  67. static PAL_LOCK cpuid_cache_lock = LOCK_INIT;
  68. static struct pal_cpuid {
  69. unsigned int recently;
  70. unsigned int leaf, subleaf;
  71. unsigned int values[4];
  72. } pal_cpuid_cache[CPUID_CACHE_SIZE];
  73. static int pal_cpuid_cache_top = 0;
  74. static unsigned int pal_cpuid_clock = 0;
  75. int get_cpuid_from_cache(unsigned int leaf, unsigned int subleaf, unsigned int values[4]) {
  76. _DkInternalLock(&cpuid_cache_lock);
  77. for (int i = 0; i < pal_cpuid_cache_top; i++)
  78. if (pal_cpuid_cache[i].leaf == leaf && pal_cpuid_cache[i].subleaf == subleaf) {
  79. values[0] = pal_cpuid_cache[i].values[0];
  80. values[1] = pal_cpuid_cache[i].values[1];
  81. values[2] = pal_cpuid_cache[i].values[2];
  82. values[3] = pal_cpuid_cache[i].values[3];
  83. pal_cpuid_cache[i].recently = ++pal_cpuid_clock;
  84. _DkInternalUnlock(&cpuid_cache_lock);
  85. return 0;
  86. }
  87. _DkInternalUnlock(&cpuid_cache_lock);
  88. return -PAL_ERROR_DENIED;
  89. }
  90. void add_cpuid_to_cache(unsigned int leaf, unsigned int subleaf, unsigned int values[4]) {
  91. struct pal_cpuid* chosen;
  92. _DkInternalLock(&cpuid_cache_lock);
  93. if (pal_cpuid_cache_top < CPUID_CACHE_SIZE) {
  94. for (int i = 0; i < pal_cpuid_cache_top; i++)
  95. if (pal_cpuid_cache[i].leaf == leaf && pal_cpuid_cache[i].subleaf == subleaf) {
  96. _DkInternalUnlock(&cpuid_cache_lock);
  97. return;
  98. }
  99. chosen = &pal_cpuid_cache[pal_cpuid_cache_top++];
  100. } else {
  101. unsigned int oldest_clock = pal_cpuid_cache[0].recently;
  102. chosen = &pal_cpuid_cache[0];
  103. if (pal_cpuid_cache[0].leaf == leaf && pal_cpuid_cache[0].subleaf == subleaf) {
  104. _DkInternalUnlock(&cpuid_cache_lock);
  105. return;
  106. }
  107. for (int i = 1; i < pal_cpuid_cache_top; i++) {
  108. if (pal_cpuid_cache[i].leaf == leaf && pal_cpuid_cache[i].subleaf == subleaf) {
  109. _DkInternalUnlock(&cpuid_cache_lock);
  110. return;
  111. }
  112. if (pal_cpuid_cache[i].recently > oldest_clock) {
  113. chosen = &pal_cpuid_cache[i];
  114. oldest_clock = pal_cpuid_cache[i].recently;
  115. }
  116. }
  117. }
  118. chosen->leaf = leaf;
  119. chosen->subleaf = subleaf;
  120. chosen->values[0] = values[0];
  121. chosen->values[1] = values[1];
  122. chosen->values[2] = values[2];
  123. chosen->values[3] = values[3];
  124. chosen->recently = ++pal_cpuid_clock;
  125. _DkInternalUnlock(&cpuid_cache_lock);
  126. }
  127. static inline uint32_t extension_enabled(uint32_t xfrm, uint32_t bit_idx) {
  128. uint32_t feature_bit = 1U << bit_idx;
  129. return xfrm & feature_bit;
  130. }
  131. static __sgx_mem_aligned sgx_report_t report;
  132. static __sgx_mem_aligned sgx_target_info_t target_info;
  133. static __sgx_mem_aligned sgx_report_data_t report_data;
  134. /**
  135. * Initialize the data structures used for CPUID emulation.
  136. */
  137. void init_cpuid(void) {
  138. memset(&report, 0, sizeof(report));
  139. memset(&target_info, 0, sizeof(target_info));
  140. memset(&report_data, 0, sizeof(report_data));
  141. sgx_report(&target_info, &report_data, &report);
  142. }
  143. /**
  144. * Sanity check untrusted CPUID inputs.
  145. *
  146. * The basic idea is that there are only a handful of extensions and we know the size needed to
  147. * store each extension's state. Use this to sanitize host's untrusted cpuid output. We also know
  148. * through xfrm what extensions are enabled inside the enclave.
  149. */
  150. static void sanity_check_cpuid(uint32_t leaf, uint32_t subleaf, uint32_t values[4]) {
  151. uint64_t xfrm = report.body.attributes.xfrm;
  152. enum cpu_extension {
  153. x87 = 0, SSE, AVX, MPX_1, MPX_2, AVX512_1, AVX512_2, AVX512_3, PKRU = 9 };
  154. const uint32_t extension_sizes_bytes[] =
  155. { [AVX] = 256, [MPX_1] = 64, [MPX_2] = 64, [AVX512_1] = 64, [AVX512_2] = 512,
  156. [AVX512_3] = 1024, [PKRU] = 8};
  157. /* Note that AVX offset is 576 bytes and MPX_1 starts at 960. The AVX state size is 256, leaving
  158. * 128 bytes unaccounted for. */
  159. const uint32_t extension_offset_bytes[] =
  160. { [AVX] = 576, [MPX_1] = 960, [MPX_2] = 1024, [AVX512_1] = 1088, [AVX512_2] = 1152,
  161. [AVX512_3] = 1664, [PKRU] = 2688};
  162. enum register_index {
  163. EAX = 0, EBX, ECX, EDX
  164. };
  165. const uint32_t EXTENDED_STATE_LEAF = 0xd;
  166. if (leaf == EXTENDED_STATE_LEAF) {
  167. switch (subleaf) {
  168. case 0x0:
  169. /* From the SDM: "EDX:EAX is a bitmap of all the user state components that can be
  170. * managed using the XSAVE feature set. A bit can be set in XCR0 if and only if the
  171. * corresponding bit is set in this bitmap. Every processor that supports the XSAVE
  172. * feature set will set EAX[0] (x87 state) and EAX[1] (SSE state)."
  173. *
  174. * On EENTER/ERESUME, the system installs xfrm into XCR0. Hence, we return xfrm here in
  175. * EAX.
  176. */
  177. values[EAX] = xfrm;
  178. /* From the SDM: "EBX enumerates the size (in bytes) required by the XSAVE instruction
  179. * for an XSAVE area containing all the user state components corresponding to bits
  180. * currently set in XCR0."
  181. */
  182. uint32_t xsave_size = 0;
  183. /* Start from AVX since x87 and SSE are always captured using XSAVE. Also, x87 and SSE
  184. * state size is implicitly included in the extension's offset, e.g., AVX's offset is
  185. * 576 which includes x87 and SSE state as well as the XSAVE header. */
  186. for (int i = AVX; i <= PKRU; i++) {
  187. if (extension_enabled(xfrm, i)) {
  188. xsave_size = extension_offset_bytes[i] + extension_sizes_bytes[i];
  189. }
  190. }
  191. values[EBX] = xsave_size;
  192. /* From the SDM: "ECX enumerates the size (in bytes) required by the XSAVE instruction
  193. * for an XSAVE area containing all the user state components supported by this
  194. * processor."
  195. *
  196. * We are assuming here that inside the enclave, ECX and EBX for leaf 0xD and subleaf
  197. * 0x1 should always be identical, while outside they can potentially be
  198. * different. Also, outside of SGX EBX can change at runtime, while ECX is a static
  199. * property.
  200. */
  201. values[ECX] = values[EBX];
  202. values[EDX] = 0;
  203. break;
  204. case 0x1: {
  205. const uint32_t xsave_legacy_size = 512;
  206. const uint32_t xsave_header = 64;
  207. uint32_t save_size_bytes = xsave_legacy_size + xsave_header;
  208. /* Start with AVX, since x87 and SSE state is already included when initializing
  209. * `save_size_bytes`. */
  210. for (int i = AVX; i <= PKRU; i++) {
  211. if (extension_enabled(xfrm, i)) {
  212. save_size_bytes += extension_sizes_bytes[i];
  213. }
  214. }
  215. /* EBX reports the actual size occupied by those extensions irrespective of their
  216. * offsets within the xsave area.
  217. */
  218. values[EBX] = save_size_bytes;
  219. break;
  220. }
  221. case AVX:
  222. case MPX_1:
  223. case MPX_2:
  224. case AVX512_1:
  225. case AVX512_2:
  226. case AVX512_3:
  227. case PKRU:
  228. if (extension_enabled(xfrm, subleaf)) {
  229. if (values[EAX] != extension_sizes_bytes[subleaf]) {
  230. SGX_DBG(DBG_E, "Unexpected value in host CPUID. Exiting...\n");
  231. _DkProcessExit(1);
  232. }
  233. } else {
  234. if (values[EAX] != 0) {
  235. SGX_DBG(DBG_E, "Unexpected value in host CPUID. Exiting...\n");
  236. _DkProcessExit(1);
  237. }
  238. }
  239. break;
  240. }
  241. }
  242. }
  243. int _DkCpuIdRetrieve(unsigned int leaf, unsigned int subleaf, unsigned int values[4]) {
  244. if (!get_cpuid_from_cache(leaf, subleaf, values))
  245. return 0;
  246. if (IS_ERR(ocall_cpuid(leaf, subleaf, values)))
  247. return -PAL_ERROR_DENIED;
  248. sanity_check_cpuid(leaf, subleaf, values);
  249. add_cpuid_to_cache(leaf, subleaf, values);
  250. return 0;
  251. }