init_tcrypto_lib.cpp 5.2 KB

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  1. /*
  2. * Copyright (C) 2011-2017 Intel Corporation. All rights reserved.
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * * Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * * Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in
  12. * the documentation and/or other materials provided with the
  13. * distribution.
  14. * * Neither the name of Intel Corporation nor the names of its
  15. * contributors may be used to endorse or promote products derived
  16. * from this software without specific prior written permission.
  17. *
  18. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  19. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  20. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  21. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  22. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  23. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  24. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  25. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  26. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  28. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29. *
  30. */
  31. #include "sgx_tcrypto.h"
  32. #include "ippcp.h"
  33. #include "ippcore.h"
  34. #include "se_cpu_feature.h"
  35. #include "se_cdefs.h"
  36. // add a version to tcrypto.
  37. SGX_ACCESS_VERSION(tcrypto, 1)
  38. #ifdef SGX_USE_OPT_LIB
  39. /* Crypto Library Initialization
  40. * Parameters:
  41. * Return: sgx_status_t - SGX_SUCCESS or failure as defined sgx_error.h
  42. * Inputs: uint64_t cpu_feature_indicator - Bit array of host CPU feature bits */
  43. extern "C" sgx_status_t sgx_init_crypto_lib(uint64_t cpu_feature_indicator)
  44. {
  45. IppStatus error_code = ippStsNoOperation;
  46. // Use cpu_feature_indicator to determine the host CPU and specify that CPU type
  47. // in the initialization of the IPP dispatcher.
  48. // NOTE: Only 2 ISA Optimized Algorithms are utilized:
  49. // 1. AVX2
  50. // 2. SSE4.1
  51. // We set SSE4.1 as the baseline.
  52. // Set the IPP feature bits based on host attributes that have been collected
  53. // NOTE: Some sanity check
  54. Ipp64u ippCpuFeatures = 0;
  55. if ((cpu_feature_indicator & CPU_FEATURE_SSE4_1) == CPU_FEATURE_SSE4_1)
  56. {
  57. // Some sanity checking has been performed when setting the feature mask
  58. // If SSE4.1 is set, then all earlier SSE/MMX ISA enhancements are available
  59. ippCpuFeatures |= (ippCPUID_SSE41 | ippCPUID_MMX | ippCPUID_SSE |
  60. ippCPUID_SSE2 | ippCPUID_SSE3 | ippCPUID_SSSE3);
  61. if ((cpu_feature_indicator & CPU_FEATURE_MOVBE) == CPU_FEATURE_MOVBE)
  62. {
  63. ippCpuFeatures |= ippCPUID_MOVBE;
  64. }
  65. if ((cpu_feature_indicator & CPU_FEATURE_SSE4_2) == CPU_FEATURE_SSE4_2)
  66. {
  67. ippCpuFeatures |= ippCPUID_SSE42;
  68. }
  69. if ((cpu_feature_indicator & CPU_FEATURE_AVX) == CPU_FEATURE_AVX)
  70. {
  71. ippCpuFeatures |= ippCPUID_AVX;
  72. ippCpuFeatures |= ippAVX_ENABLEDBYOS;
  73. }
  74. if ((cpu_feature_indicator & CPU_FEATURE_AES) == CPU_FEATURE_AES)
  75. {
  76. ippCpuFeatures |= ippCPUID_AES;
  77. }
  78. if ((cpu_feature_indicator & CPU_FEATURE_PCLMULQDQ) == CPU_FEATURE_PCLMULQDQ)
  79. {
  80. ippCpuFeatures |= ippCPUID_CLMUL;
  81. }
  82. if ((cpu_feature_indicator & CPU_FEATURE_RDRND) == CPU_FEATURE_RDRND)
  83. {
  84. ippCpuFeatures |= ippCPUID_RDRAND;
  85. }
  86. if ((cpu_feature_indicator & CPU_FEATURE_F16C) == CPU_FEATURE_F16C)
  87. {
  88. ippCpuFeatures |= ippCPUID_F16C;
  89. }
  90. if ((cpu_feature_indicator & CPU_FEATURE_AVX2) == CPU_FEATURE_AVX2)
  91. {
  92. ippCpuFeatures |= ippCPUID_AVX2;
  93. }
  94. if ((cpu_feature_indicator & CPU_FEATURE_ADCOX) == CPU_FEATURE_ADCOX)
  95. {
  96. ippCpuFeatures |= ippCPUID_ADCOX;
  97. }
  98. if ((cpu_feature_indicator & CPU_FEATURE_RDSEED) == CPU_FEATURE_RDSEED)
  99. {
  100. ippCpuFeatures |= ippCPUID_RDSEED;
  101. }
  102. if ((cpu_feature_indicator & CPU_FEATURE_PREFETCHW) == CPU_FEATURE_PREFETCHW)
  103. {
  104. ippCpuFeatures |= ippCPUID_PREFETCHW;
  105. }
  106. if ((cpu_feature_indicator & CPU_FEATURE_PCLMULQDQ) == CPU_FEATURE_PCLMULQDQ)
  107. {
  108. ippCpuFeatures |= ippCPUID_CLMUL;
  109. }
  110. }
  111. else
  112. {
  113. // Return error if the old platoform has no SSE4.1
  114. return SGX_ERROR_INVALID_PARAMETER;
  115. }
  116. // Call SetCpuFeatures() to set the IPP library with the collected CPU features
  117. ippCpuFeatures |= ippCPUID_NOCHECK; /* Force ippSetCpuFeatures to set CPU features without check */
  118. error_code = ippSetCpuFeatures(ippCpuFeatures);
  119. if (error_code != ippStsNoErr)
  120. {
  121. return SGX_ERROR_INVALID_PARAMETER;
  122. }
  123. return SGX_SUCCESS;
  124. }
  125. #else
  126. extern "C" sgx_status_t sgx_init_crypto_lib(uint64_t cpu_feature_indicator)
  127. {
  128. (void) cpu_feature_indicator;
  129. return SGX_SUCCESS;
  130. }
  131. #endif