enclave_creator_hw.cpp 8.0 KB

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  1. /*
  2. * Copyright (C) 2011-2016 Intel Corporation. All rights reserved.
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * * Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * * Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in
  12. * the documentation and/or other materials provided with the
  13. * distribution.
  14. * * Neither the name of Intel Corporation nor the names of its
  15. * contributors may be used to endorse or promote products derived
  16. * from this software without specific prior written permission.
  17. *
  18. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  19. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  20. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  21. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  22. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  23. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  24. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  25. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  26. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  28. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29. *
  30. */
  31. #include "enclave_creator_hw.h"
  32. #include "se_trace.h"
  33. #include "se_page_attr.h"
  34. #include "isgx_user.h"
  35. #include "sig_handler.h"
  36. #include "se_error_internal.h"
  37. #include "se_memcpy.h"
  38. #include "se_atomic.h"
  39. #include "se_detect.h"
  40. #include "cpuid.h"
  41. #include <assert.h>
  42. #include <sys/types.h>
  43. #include <sys/stat.h>
  44. #include <fcntl.h>
  45. #include <sys/ioctl.h>
  46. #include <errno.h>
  47. #include <sys/mman.h>
  48. #include <stdlib.h>
  49. EnclaveCreator* g_enclave_creator = new EnclaveCreatorHW();
  50. static uint32_t g_eid_low = 0x1;
  51. static uint32_t g_eid_high = 0x0;
  52. EnclaveCreatorHW::EnclaveCreatorHW():
  53. m_hdevice(-1),
  54. m_sig_registered(false)
  55. {
  56. se_mutex_init(&m_sig_mutex);
  57. }
  58. EnclaveCreatorHW::~EnclaveCreatorHW()
  59. {
  60. close_se_device();
  61. }
  62. int EnclaveCreatorHW::error_driver2urts(int driver_error)
  63. {
  64. int ret = SGX_ERROR_UNEXPECTED;
  65. switch(driver_error)
  66. {
  67. #if 0
  68. case SGX_ERROR:
  69. if(ENOMEM == errno)
  70. ret = SGX_ERROR_OUT_OF_MEMORY;
  71. else
  72. ret = SGX_ERROR_NO_DEVICE;
  73. break;
  74. #endif
  75. case SGX_INVALID_ATTRIBUTE:
  76. ret = SGX_ERROR_INVALID_ATTRIBUTE;
  77. break;
  78. case SGX_INVALID_MEASUREMENT:
  79. ret = SE_ERROR_INVALID_MEASUREMENT;
  80. break;
  81. case SGX_INVALID_SIG_STRUCT:
  82. case SGX_INVALID_SIGNATURE:
  83. ret = SGX_ERROR_INVALID_SIGNATURE;
  84. break;
  85. case SGX_INVALID_CPUSVN:
  86. ret = SGX_ERROR_INVALID_CPUSVN;
  87. break;
  88. case SGX_INVALID_ISVSVN:
  89. ret = SGX_ERROR_INVALID_ISVSVN;
  90. break;
  91. case SGX_UNMASKED_EVENT:
  92. ret = SGX_ERROR_DEVICE_BUSY;
  93. break;
  94. case (int)SGX_POWER_LOST_ENCLAVE: // [-Wc++11-narrowing]
  95. ret = SGX_ERROR_ENCLAVE_LOST;
  96. break;
  97. default:
  98. SE_TRACE(SE_TRACE_WARNING, "unexpected error %#X from driver, should be uRTS/driver bug\n", driver_error);
  99. ret = SGX_ERROR_UNEXPECTED;
  100. break;
  101. }
  102. return ret;
  103. }
  104. int EnclaveCreatorHW::create_enclave(secs_t *secs, sgx_enclave_id_t *enclave_id, void **start_addr, bool ae)
  105. {
  106. assert(secs != NULL && enclave_id != NULL && start_addr != NULL);
  107. UNUSED(ae);
  108. int ret = 0;
  109. if (false == open_se_device())
  110. return SGX_ERROR_NO_DEVICE;
  111. SE_TRACE(SE_TRACE_DEBUG, "\n secs.attibutes.flags = %llx, secs.attributes.xfrm = %llx \n"
  112. , secs->attributes.flags, secs->attributes.xfrm);
  113. //SECS:BASEADDR must be naturally aligned on an SECS.SIZE boundary
  114. void* enclave_base = mmap(NULL, (size_t)secs->size *2, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_SHARED, m_hdevice, 0);
  115. if(enclave_base == NULL)
  116. {
  117. SE_TRACE(SE_TRACE_WARNING, "\nISGX_IOCTL_ENCLAVE_CREATE fails: mmap fail\n");
  118. return SGX_ERROR_OUT_OF_MEMORY;
  119. }
  120. //find a suitable base for enclave
  121. uint64_t base = (uint64_t)enclave_base + (secs->size - ((uint64_t)enclave_base % secs->size)) ;
  122. secs->base = (void*)base;
  123. //remove unneed page
  124. munmap(enclave_base, (size_t)(secs->base) - (size_t)(enclave_base));
  125. if(((uint64_t)(enclave_base) + secs->size *2) != ((uint64_t)secs->base + secs->size))
  126. {
  127. munmap((void*)((size_t)secs->base + secs->size), (size_t)(enclave_base) + (size_t)secs->size - (size_t)(secs->base));
  128. }
  129. struct sgx_enclave_create param = {0};
  130. param.src = (__u64)(secs);
  131. ret = ioctl(m_hdevice, SGX_IOC_ENCLAVE_CREATE, &param);
  132. if(ret) {
  133. SE_TRACE(SE_TRACE_WARNING, "\nISGX_IOCTL_ENCLAVE_CREATE fails: errno = %x\n", errno);
  134. return error_driver2urts(ret);
  135. }
  136. uint32_t tmp = se_atomic_inc(&g_eid_low);
  137. //32bit overflow
  138. if(0 == tmp)
  139. g_eid_high++;
  140. *enclave_id = ((uint64_t)g_eid_high << 32) | g_eid_low;
  141. *start_addr = secs->base;
  142. return SGX_SUCCESS;
  143. }
  144. int EnclaveCreatorHW::add_enclave_page(sgx_enclave_id_t enclave_id, void *src, uint64_t rva, const sec_info_t &sinfo, uint32_t attr)
  145. {
  146. assert((rva & ((1<<SE_PAGE_SHIFT)-1)) == 0);
  147. void* source = src;
  148. uint8_t color_page[SE_PAGE_SIZE] = { 0 };
  149. if(NULL == source)
  150. {
  151. memset(color_page, 0, SE_PAGE_SIZE);
  152. source = reinterpret_cast<void*>(&color_page);
  153. }
  154. int ret = 0;
  155. struct sgx_enclave_add_page addp = { 0, 0, 0, 0 };
  156. addp.addr = (__u64)enclave_id + (__u64)rva;
  157. addp.src = reinterpret_cast<__u64>(source);
  158. addp.secinfo = reinterpret_cast<__u64>(const_cast<sec_info_t *>(&sinfo));
  159. if(((1<<DoEEXTEND) & attr))
  160. addp.mrmask |= 0xFFFF;
  161. ret = ioctl(m_hdevice, SGX_IOC_ENCLAVE_ADD_PAGE, &addp);
  162. if(ret) {
  163. SE_TRACE(SE_TRACE_WARNING, "\nAdd Page - %p to %p... FAIL\n", source, rva);
  164. return error_driver2urts(ret);
  165. }
  166. return SGX_SUCCESS;
  167. }
  168. int EnclaveCreatorHW::try_init_enclave(sgx_enclave_id_t enclave_id, enclave_css_t *enclave_css, token_t *launch)
  169. {
  170. int ret = 0;
  171. struct sgx_enclave_init initp = { 0, 0, 0 };
  172. initp.addr = (__u64)enclave_id;
  173. initp.sigstruct = reinterpret_cast<__u64>(enclave_css);
  174. //launch should NOT be NULL, because it has been checked in urts_com.h::_create_enclave(...)
  175. assert(launch != NULL);
  176. initp.einittoken = reinterpret_cast<__u64>(launch);
  177. ret = ioctl(m_hdevice, SGX_IOC_ENCLAVE_INIT, &initp);
  178. if (ret) {
  179. SE_TRACE(SE_TRACE_WARNING, "\nISGX_IOCTL_ENCLAVE_INIT fails error = %x\n", ret);
  180. return error_driver2urts(ret);
  181. }
  182. //register signal handler
  183. se_mutex_lock(&m_sig_mutex);
  184. if(false == m_sig_registered)
  185. {
  186. reg_sig_handler();
  187. m_sig_registered = true;
  188. }
  189. se_mutex_unlock(&m_sig_mutex);
  190. return SGX_SUCCESS;
  191. }
  192. //for linux hw mode, enclave_id is actually start address here
  193. int EnclaveCreatorHW::destroy_enclave(sgx_enclave_id_t enclave_id, uint64_t enclave_size)
  194. {
  195. int ret = 0;
  196. ret = munmap((void*)enclave_id, (size_t)enclave_size);
  197. if (0 != ret) {
  198. SE_TRACE(SE_TRACE_WARNING, "destroy SGX enclave failed, error = %d\n", errno);
  199. ret = SGX_ERROR_UNEXPECTED;
  200. }
  201. else
  202. {
  203. ret = SGX_SUCCESS;
  204. }
  205. return ret;
  206. }
  207. bool EnclaveCreatorHW::get_plat_cap(sgx_misc_attribute_t *misc_attr)
  208. {
  209. return get_plat_cap_by_cpuid(misc_attr);
  210. }
  211. bool EnclaveCreatorHW::open_se_device()
  212. {
  213. LockGuard lock(&m_dev_mutex);
  214. int fd = -1;
  215. if(-1 != m_hdevice)
  216. {
  217. return true;
  218. }
  219. fd = open("/dev/isgx", O_RDWR);
  220. if (-1 == fd) {
  221. SE_TRACE(SE_TRACE_WARNING, "open isgx device failed\n");
  222. return false;
  223. }
  224. m_hdevice = fd;
  225. return true;
  226. }
  227. void EnclaveCreatorHW::close_se_device()
  228. {
  229. LockGuard lock(&m_dev_mutex);
  230. if (m_hdevice != -1)
  231. {
  232. close(m_hdevice);
  233. m_hdevice = -1;
  234. }
  235. }