pce.cpp 10 KB

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  1. /*
  2. * Copyright (C) 2011-2018 Intel Corporation. All rights reserved.
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * * Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * * Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in
  12. * the documentation and/or other materials provided with the
  13. * distribution.
  14. * * Neither the name of Intel Corporation nor the names of its
  15. * contributors may be used to endorse or promote products derived
  16. * from this software without specific prior written permission.
  17. *
  18. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  19. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  20. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  21. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  22. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  23. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  24. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  25. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  26. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  28. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29. *
  30. */
  31. #include "pce_cert.h"
  32. #include "pce_t.c"
  33. #include "aeerror.h"
  34. #include "sgx_utils.h"
  35. #include "ipp_wrapper.h"
  36. #include "byte_order.h"
  37. #include "pve_qe_common.h"
  38. #include "arch.h"
  39. #include <assert.h>
  40. ae_error_t get_ppid(ppid_t* ppid);
  41. ae_error_t get_pce_priv_key(const psvn_t* psvn, sgx_ec256_private_t* wrap_key);
  42. #define PCE_RSA_SEED_SIZE 32
  43. #define RSA_MOD_SIZE 384 //hardcode n size to be 384
  44. #define RSA_E_SIZE 4 //hardcode e size to be 4
  45. se_static_assert(RSA_MOD_SIZE == PEK_MOD_SIZE);
  46. //Function to generate Current isvsvn from REPORT
  47. static ae_error_t get_isv_svn(sgx_isv_svn_t* isv_svn)
  48. {
  49. sgx_status_t se_ret = SGX_SUCCESS;
  50. sgx_report_t report;
  51. memset(&report, 0, sizeof(report));
  52. se_ret = sgx_create_report(NULL, NULL, &report);
  53. if(SGX_SUCCESS != se_ret){
  54. (void)memset_s(&report,sizeof(report), 0, sizeof(report));
  55. return PCE_UNEXPECTED_ERROR;
  56. }
  57. memcpy(isv_svn, &report.body.isv_svn, sizeof(report.body.isv_svn));
  58. (void)memset_s(&report, sizeof(report), 0, sizeof(report));
  59. return AE_SUCCESS;
  60. }
  61. //always assume the format of public_key is module n of RSA public key followed by 4 bytes e and both n and e are in Big Endian
  62. uint32_t get_pc_info(const sgx_report_t* report,
  63. const uint8_t *public_key, uint32_t key_size,
  64. uint8_t crypto_suite,
  65. uint8_t *encrypted_ppid, uint32_t encrypted_ppid_buf_size,
  66. uint32_t *encrypted_ppid_out_size,
  67. pce_info_t *pce_info,
  68. uint8_t *signature_scheme)
  69. {
  70. if (report == NULL ||
  71. public_key == NULL ||
  72. encrypted_ppid == NULL ||
  73. encrypted_ppid_out_size == NULL ||
  74. pce_info == NULL||
  75. signature_scheme == NULL){
  76. return AE_INVALID_PARAMETER;
  77. }
  78. if(ALG_RSA_OAEP_3072!=crypto_suite){//The only crypto suite supported in RSA 3072 where 384 bytes module n is used
  79. return AE_INVALID_PARAMETER;
  80. }
  81. //RSA public key is mod || e
  82. if (RSA_MOD_SIZE + RSA_E_SIZE != key_size)
  83. {
  84. return AE_INVALID_PARAMETER;
  85. }
  86. *encrypted_ppid_out_size = RSA_MOD_SIZE;//output size is same as public key module size
  87. if (encrypted_ppid_buf_size < RSA_MOD_SIZE){
  88. return AE_INSUFFICIENT_DATA_IN_BUFFER;
  89. }
  90. if(SGX_SUCCESS != sgx_verify_report(report)){
  91. return PCE_INVALID_REPORT;
  92. }
  93. if((report->body.attributes.flags & SGX_FLAGS_PROVISION_KEY) != SGX_FLAGS_PROVISION_KEY ||
  94. (report->body.attributes.flags & SGX_FLAGS_DEBUG) != 0){
  95. return PCE_INVALID_PRIVILEGE;
  96. }
  97. uint8_t hash_buf[SGX_REPORT_DATA_SIZE];//hash value only use 32 bytes but data in report has 64 bytes size
  98. se_static_assert(sizeof(hash_buf)>=sizeof(sgx_sha256_hash_t));
  99. memset(hash_buf, 0, sizeof(hash_buf));
  100. sgx_sha_state_handle_t sha_handle = NULL;
  101. sgx_status_t sgx_ret = SGX_ERROR_UNEXPECTED;
  102. do
  103. {
  104. sgx_ret = sgx_sha256_init(&sha_handle);
  105. if (SGX_SUCCESS != sgx_ret)
  106. break;
  107. sgx_ret = sgx_sha256_update(&crypto_suite, sizeof(uint8_t), sha_handle);
  108. if (SGX_SUCCESS != sgx_ret)
  109. break;
  110. sgx_ret = sgx_sha256_update(public_key, RSA_MOD_SIZE + RSA_E_SIZE, sha_handle);
  111. if (SGX_SUCCESS != sgx_ret)
  112. break;
  113. sgx_ret = sgx_sha256_get_hash(sha_handle, reinterpret_cast<sgx_sha256_hash_t *>(hash_buf));
  114. } while (0);
  115. if (sha_handle != NULL)
  116. sgx_sha256_close(sha_handle);
  117. if (SGX_ERROR_OUT_OF_MEMORY == sgx_ret){
  118. return AE_OUT_OF_MEMORY_ERROR;
  119. }
  120. else if (SGX_SUCCESS != sgx_ret){
  121. return AE_FAILURE;
  122. }
  123. //verify the report data is SHA256(crypto_suite||public_key)||0-padding
  124. if(memcmp(hash_buf, &report->body.report_data, sizeof(report->body.report_data))!=0){
  125. return AE_INVALID_PARAMETER;
  126. }
  127. ppid_t ppid_buf;
  128. IppsRSAPublicKeyState *pub_key = NULL;
  129. int pub_key_size = 0;
  130. Ipp8u seeds[PCE_RSA_SEED_SIZE] = { 0 };
  131. uint8_t *pub_key_buffer = NULL;
  132. IppStatus ipp_ret;
  133. uint32_t little_endian_e = 0;
  134. uint8_t *le_n = NULL;
  135. ae_error_t ae_ret = get_ppid(&ppid_buf);
  136. if(ae_ret!=AE_SUCCESS){
  137. goto RETURN_POINT;
  138. }
  139. little_endian_e = lv_ntohl(*(public_key + RSA_MOD_SIZE));
  140. le_n = (uint8_t *)malloc(RSA_MOD_SIZE);
  141. if (le_n == NULL){
  142. ae_ret = AE_OUT_OF_MEMORY_ERROR;
  143. goto RETURN_POINT;
  144. }
  145. for (size_t i = 0; i<RSA_MOD_SIZE; i++){
  146. le_n[i] = *(public_key + RSA_MOD_SIZE - 1 - i);//create little endian n
  147. }
  148. ipp_ret = create_rsa_pub_key(RSA_MOD_SIZE, RSA_E_SIZE,
  149. reinterpret_cast<const Ipp32u *>(le_n),
  150. &little_endian_e,
  151. &pub_key);
  152. free(le_n);
  153. if (ippStsMemAllocErr == ipp_ret){
  154. ae_ret = AE_OUT_OF_MEMORY_ERROR;
  155. goto RETURN_POINT;
  156. }
  157. else if(ippStsNoErr != ipp_ret){//possible invalid rsa public key
  158. ae_ret = AE_FAILURE;
  159. goto RETURN_POINT;
  160. }
  161. ipp_ret = ippsRSA_GetBufferSizePublicKey(&pub_key_size, pub_key);
  162. if (ipp_ret != ippStsNoErr){
  163. ae_ret = AE_FAILURE;
  164. goto RETURN_POINT;
  165. }
  166. if (SGX_SUCCESS != sgx_read_rand(seeds, PCE_RSA_SEED_SIZE)){
  167. ae_ret = AE_READ_RAND_ERROR;
  168. goto RETURN_POINT;
  169. }
  170. pub_key_buffer = (uint8_t *)malloc(pub_key_size);
  171. if (pub_key_buffer == NULL){
  172. ae_ret = AE_OUT_OF_MEMORY_ERROR;
  173. goto RETURN_POINT;
  174. }
  175. ipp_ret = ippsRSAEncrypt_OAEP(reinterpret_cast<const Ipp8u *>(&ppid_buf), sizeof(ppid_buf), NULL, 0, seeds,
  176. encrypted_ppid, pub_key, IPP_ALG_HASH_SHA256, pub_key_buffer);
  177. if (ipp_ret != ippStsNoErr){
  178. ae_ret = AE_FAILURE;
  179. goto RETURN_POINT;
  180. }
  181. ae_ret = get_isv_svn(&pce_info->pce_isvn);
  182. if (ae_ret != AE_SUCCESS){
  183. goto RETURN_POINT;
  184. }
  185. pce_info->pce_id = CUR_PCE_ID;
  186. *signature_scheme = NIST_P256_ECDSA_SHA256;
  187. ae_ret = AE_SUCCESS;
  188. RETURN_POINT:
  189. memset_s(&ppid_buf, sizeof(ppid_buf), 0, sizeof(ppid_t));
  190. if(NULL != pub_key)
  191. secure_free_rsa_pub_key(RSA_MOD_SIZE, RSA_E_SIZE, pub_key);
  192. if (NULL != pub_key_buffer)
  193. free(pub_key_buffer);
  194. if (AE_SUCCESS != ae_ret)
  195. memset_s(encrypted_ppid, encrypted_ppid_buf_size, 0, *encrypted_ppid_out_size);
  196. return ae_ret;
  197. }
  198. uint32_t certify_enclave(const psvn_t* cert_psvn,
  199. const sgx_report_t* report,
  200. uint8_t *signature,
  201. uint32_t signature_buf_size,
  202. uint32_t *signature_out_size)
  203. {
  204. if(cert_psvn==NULL||
  205. report==NULL||
  206. signature == NULL||
  207. signature_out_size == NULL){
  208. return AE_INVALID_PARAMETER;
  209. }
  210. if(signature_buf_size < sizeof(sgx_ec256_signature_t)){
  211. *signature_out_size = sizeof(sgx_ec256_signature_t);
  212. return AE_INSUFFICIENT_DATA_IN_BUFFER;
  213. }
  214. ae_error_t ae_ret = AE_FAILURE;
  215. sgx_ecc_state_handle_t handle=NULL;
  216. sgx_ec256_private_t ec_prv_key = {0};
  217. sgx_status_t sgx_status = SGX_SUCCESS;
  218. if(SGX_SUCCESS != sgx_verify_report(report)){
  219. return PCE_INVALID_REPORT;
  220. }
  221. //only PvE could use the interface which has flag SGX_FLAGS_PROVISION_KEY
  222. if((report->body.attributes.flags & SGX_FLAGS_PROVISION_KEY) != SGX_FLAGS_PROVISION_KEY ||
  223. (report->body.attributes.flags & SGX_FLAGS_DEBUG) != 0){
  224. return PCE_INVALID_PRIVILEGE;
  225. }
  226. ae_ret = get_pce_priv_key(cert_psvn, &ec_prv_key);
  227. if(AE_SUCCESS!=ae_ret){
  228. goto ret_point;
  229. }
  230. SWAP_ENDIAN_32B(&ec_prv_key);
  231. sgx_status = sgx_ecc256_open_context(&handle);
  232. if (SGX_ERROR_OUT_OF_MEMORY == sgx_status)
  233. {
  234. ae_ret = AE_OUT_OF_MEMORY_ERROR;
  235. goto ret_point;
  236. }
  237. else if (SGX_SUCCESS != sgx_status) {
  238. ae_ret = AE_FAILURE;
  239. goto ret_point;
  240. }
  241. sgx_status = sgx_ecdsa_sign(reinterpret_cast<const uint8_t *>(&report->body), sizeof(report->body),
  242. &ec_prv_key, reinterpret_cast<sgx_ec256_signature_t *>(signature), handle);
  243. if (SGX_ERROR_OUT_OF_MEMORY == sgx_status)
  244. {
  245. ae_ret = AE_OUT_OF_MEMORY_ERROR;
  246. goto ret_point;
  247. }
  248. else if (SGX_SUCCESS != sgx_status) {
  249. ae_ret = AE_FAILURE;
  250. goto ret_point;
  251. }
  252. //swap from little endian used in sgx_crypto to big endian used in network byte order
  253. SWAP_ENDIAN_32B(reinterpret_cast<sgx_ec256_signature_t *>(signature)->x);
  254. SWAP_ENDIAN_32B(reinterpret_cast<sgx_ec256_signature_t *>(signature)->y);
  255. *signature_out_size = sizeof(sgx_ec256_signature_t);
  256. ae_ret = AE_SUCCESS;
  257. ret_point:
  258. (void)memset_s(&ec_prv_key, sizeof(ec_prv_key),0,sizeof(ec_prv_key));
  259. if(handle!=NULL){
  260. sgx_ecc256_close_context(handle);
  261. }
  262. if(AE_SUCCESS != ae_ret){
  263. (void)memset_s(signature, signature_buf_size, 0, sizeof(sgx_ec256_signature_t));
  264. }
  265. return ae_ret;
  266. }