ippcore.h 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395
  1. /*
  2. * Copyright (C) 2016 Intel Corporation. All rights reserved.
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * * Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * * Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in
  12. * the documentation and/or other materials provided with the
  13. * distribution.
  14. * * Neither the name of Intel Corporation nor the names of its
  15. * contributors may be used to endorse or promote products derived
  16. * from this software without specific prior written permission.
  17. *
  18. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  19. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  20. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  21. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  22. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  23. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  24. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  25. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  26. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  28. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29. *
  30. */
  31. #if !defined( __IPPCORE_H__ ) || defined( _OWN_BLDPCS )
  32. #define __IPPCORE_H__
  33. #if defined (_WIN32_WCE) && defined (_M_IX86) && defined (__stdcall)
  34. #define _IPP_STDCALL_CDECL
  35. #undef __stdcall
  36. #endif
  37. #ifndef __IPPDEFS_H__
  38. #include "ippdefs.h"
  39. #endif
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. #if !defined( _IPP_NO_DEFAULT_LIB )
  44. #if defined( _IPP_SEQUENTIAL_DYNAMIC )
  45. #pragma comment( lib, __FILE__ "/../../lib/" _INTEL_PLATFORM "ippcore" )
  46. #elif defined( _IPP_SEQUENTIAL_STATIC )
  47. #pragma comment( lib, __FILE__ "/../../lib/" _INTEL_PLATFORM "ippcoremt" )
  48. #elif defined( _IPP_PARALLEL_DYNAMIC )
  49. #pragma comment( lib, __FILE__ "/../../lib/" _INTEL_PLATFORM "threaded/ippcore" )
  50. #elif defined( _IPP_PARALLEL_STATIC )
  51. #pragma comment( lib, __FILE__ "/../../lib/" _INTEL_PLATFORM "threaded/ippcoremt" )
  52. #endif
  53. #endif
  54. /* /////////////////////////////////////////////////////////////////////////////
  55. ////////////////////////////////////////////////////////////////////////////////
  56. // Functions declarations
  57. ////////////////////////////////////////////////////////////////////////////////
  58. ///////////////////////////////////////////////////////////////////////////// */
  59. /* /////////////////////////////////////////////////////////////////////////////
  60. // Name: ippGetLibVersion
  61. // Purpose: getting of the library version
  62. // Returns: the structure of information about version
  63. // of ippcore library
  64. // Parameters:
  65. //
  66. // Notes: not necessary to release the returned structure
  67. */
  68. IPPAPI( const IppLibraryVersion*, ippGetLibVersion, (void) )
  69. /* /////////////////////////////////////////////////////////////////////////////
  70. // Name: ippGetStatusString
  71. // Purpose: convert the library status code to a readable string
  72. // Parameters:
  73. // StsCode IPP status code
  74. // Returns: pointer to string describing the library status code
  75. //
  76. // Notes: don't free the pointer
  77. */
  78. IPPAPI( const char*, ippGetStatusString, ( IppStatus StsCode ) )
  79. /* /////////////////////////////////////////////////////////////////////////////
  80. // Name: ippGetCpuClocks
  81. // Purpose: reading of time stamp counter (TSC) register value
  82. // Returns: TSC value
  83. //
  84. // Note: An hardware exception is possible if TSC reading is not supported by
  85. / the current chipset
  86. */
  87. IPPAPI( Ipp64u, ippGetCpuClocks, (void) )
  88. /* ///////////////////////////////////////////////////////////////////////////
  89. // Names: ippSetFlushToZero,
  90. // ippSetDenormAreZero.
  91. //
  92. // Purpose: ippSetFlushToZero enables or disables the flush-to-zero mode,
  93. // ippSetDenormAreZero enables or disables the denormals-are-zeros
  94. // mode.
  95. //
  96. // Arguments:
  97. // value - !0 or 0 - set or clear the corresponding bit of MXCSR
  98. // pUMask - pointer to user store current underflow exception mask
  99. // ( may be NULL if don't want to store )
  100. //
  101. // Return:
  102. // ippStsNoErr - Ok
  103. // ippStsCpuNotSupportedErr - the mode is not supported
  104. */
  105. IPPAPI( IppStatus, ippSetFlushToZero, ( int value, unsigned int* pUMask ))
  106. IPPAPI( IppStatus, ippSetDenormAreZeros, ( int value ))
  107. /* /////////////////////////////////////////////////////////////////////////////
  108. // Name: ippAlignPtr
  109. // Purpose: pointer aligning
  110. // Returns: aligned pointer
  111. //
  112. // Parameter:
  113. // ptr - pointer
  114. // alignBytes - number of bytes to align
  115. //
  116. */
  117. IPPAPI( void*, ippAlignPtr, ( void * ptr, int alignBytes ) )
  118. /* /////////////////////////////////////////////////////////////////////////////
  119. // Functions to allocate and free memory
  120. ///////////////////////////////////////////////////////////////////////////// */
  121. /* /////////////////////////////////////////////////////////////////////////////
  122. // Name: ippMalloc
  123. // Purpose: 64-byte aligned memory allocation
  124. // Parameter:
  125. // len number of bytes
  126. // Returns: pointer to allocated memory
  127. //
  128. // Notes: the memory allocated by ippMalloc has to be free by ippFree
  129. // function only.
  130. */
  131. IPPAPI( void*, ippMalloc, (int length) )
  132. /* /////////////////////////////////////////////////////////////////////////////
  133. // Name: ippFree
  134. // Purpose: free memory allocated by the ippMalloc function
  135. // Parameter:
  136. // ptr pointer to the memory allocated by the ippMalloc function
  137. //
  138. // Notes: use the function to free memory allocated by ippMalloc
  139. */
  140. IPPAPI( void, ippFree, (void* ptr) )
  141. /* /////////////////////////////////////////////////////////////////////////////
  142. // Name: ippInit
  143. // Purpose: Automatic switching to best for current cpu library code using.
  144. // Returns:
  145. // ippStsNoErr
  146. //
  147. // Parameter: nothing
  148. //
  149. // Notes: At the moment of this function execution no any other IPP function
  150. // has to be working
  151. */
  152. IPPAPI( IppStatus, ippInit, ( void ))
  153. /* ////////////////////////////////////////////////////////////////////////////
  154. // Name: ippGetCpuFreqMhz
  155. //
  156. // Purpose: the function estimates cpu frequency and returns
  157. // its value in MHz as a integer
  158. //
  159. // Return:
  160. // ippStsNoErr Ok
  161. // ippStsNullPtrErr null pointer to the freq value
  162. // ippStsSizeErr wrong num of tries, internal var
  163. // Arguments:
  164. // pMhz pointer to the integer to write
  165. // cpu freq value estimated
  166. //
  167. // Notes: no exact value is guaranteed, the value could
  168. // vary with cpu workloading
  169. */
  170. IPPAPI(IppStatus, ippGetCpuFreqMhz, ( int* pMhz ) )
  171. /* ////////////////////////////////////////////////////////////////////////////
  172. // Name: ippSetNumThreads
  173. //
  174. // Purpose:
  175. //
  176. // Return:
  177. // ippStsNoErr Ok
  178. // ippStsNoOperation For static library internal threading is not supported
  179. // ippStsSizeErr Desired number of threads less or equal zero
  180. //
  181. // Arguments:
  182. // numThr Desired number of threads
  183. */
  184. IPPAPI( IppStatus, ippSetNumThreads, ( int numThr ) )
  185. /* ////////////////////////////////////////////////////////////////////////////
  186. // Name: ippGetNumThreads
  187. //
  188. // Purpose:
  189. //
  190. // Return:
  191. // ippStsNoErr Ok
  192. // ippStsNullPtrErr Pointer to numThr is Null
  193. // ippStsNoOperation For static library internal threading is not supported
  194. // and return value is always == 1
  195. //
  196. // Arguments:
  197. // pNumThr Pointer to memory location where to store current numThr
  198. */
  199. IPPAPI( IppStatus, ippGetNumThreads, (int* pNumThr) )
  200. /* ////////////////////////////////////////////////////////////////////////////
  201. // Name: ippGetMaxCacheSizeB
  202. //
  203. // Purpose: Detects maximal from the sizes of L2 or L3 in bytes
  204. //
  205. // Return:
  206. // ippStsNullPtrErr The result's pointer is NULL.
  207. // ippStsNotSupportedCpu The cpu is not supported.
  208. // ippStsUnknownCacheSize The cpu is supported, but the size of the cache is unknown.
  209. // ippStsNoErr Ok
  210. //
  211. // Arguments:
  212. // pSizeByte Pointer to the result
  213. //
  214. // Note:
  215. // 1). Intel(R) processors are supported only.
  216. // 2). Intel(R) Itanium(R) processors and platforms with Intel XScale(R) technology are unsupported
  217. // 3). For unsupported processors the result is "0",
  218. // and the return status is "ippStsNotSupportedCpu".
  219. // 4). For supported processors the result is "0",
  220. // and the return status is "ippStsUnknownCacheSize".
  221. // if sizes of the cache is unknown.
  222. //
  223. */
  224. IPPAPI( IppStatus, ippGetMaxCacheSizeB, ( int* pSizeByte ) )
  225. /*
  226. // Name: ippGetCpuFeatures
  227. // Purpose: Detects CPU features.
  228. // Parameters:
  229. // pFeaturesMask Pointer to the features mask.
  230. // Nonzero value of bit means the corresponding feature is supported.
  231. // Features mask values are defined in the ippdefs.h
  232. // [ 0] - MMX ( ippCPUID_MMX )
  233. // [ 1] - SSE ( ippCPUID_SSE )
  234. // [ 2] - SSE2 ( ippCPUID_SSE2 )
  235. // [ 3] - SSE3 ( ippCPUID_SSE3 )
  236. // [ 4] - SSSE3 ( ippCPUID_SSSE3 )
  237. // [ 5] - MOVBE ( ippCPUID_MOVBE )
  238. // [ 6] - SSE41 ( ippCPUID_SSE41 )
  239. // [ 7] - SSE42 ( ippCPUID_SSE42 )
  240. // [ 8] - AVX ( ippCPUID_AVX )
  241. // [ 9] - ENABLEDBYOS( ippAVX_ENABLEDBYOS )
  242. // [10] - AES ( ippCPUID_AES )
  243. // [11] - PCLMULQDQ ( ippCPUID_CLMUL )
  244. // [12] - ABR ( ippCPUID_ABR )
  245. // [13] - RDRAND ( ippCPUID_RDRAND )
  246. // [14] - F16C ( ippCPUID_F16C )
  247. // [15] - AVX2 ( ippCPUID_AVX2 )
  248. // [16] - ADOX/ADCX ( ippCPUID_ADCOX ) ADCX and ADOX instructions
  249. // [17] - RDSEED ( ippCPUID_RDSEED ) The RDSEED instruction
  250. // [18] - PREFETCHW ( ippCPUID_PREFETCHW ) The PREFETCHW instruction
  251. // [19] - SHA ( ippCPUID_SHA ) Intel (R) SHA Extensions
  252. // [20:63] - Reserved
  253. //
  254. // pCpuidInfoRegs Pointer to the 4-element vector.
  255. // Result of CPUID.1 are stored in this vector.
  256. // [0] - register EAX
  257. // [1] - register EBX
  258. // [2] - register ECX
  259. // [3] - register EDX
  260. // If pointer pCpuidInfoRegs is set to NULL, registers are not stored.
  261. //
  262. // Returns:
  263. // ippStsNullPtrErr The pointer to the features mask (pFeaturesMask) is NULL.
  264. // ippStsNotSupportedCpu CPU is not supported.
  265. // ippStsNoErr Ok
  266. //
  267. // Note: Only IA-32 and Intel(R) 64 are supported
  268. */
  269. IPPAPI( IppStatus, ippGetCpuFeatures, ( Ipp64u* pFeaturesMask,
  270. Ipp32u pCpuidInfoRegs[4] ) )
  271. /*
  272. // Name: ippGetEnabledCpuFeatures
  273. // Purpose: Detects enabled features for loaded libraries
  274. // Returns: Features mask
  275. // Features mask values are defined in the ippdefs.h
  276. // [ 0] - ippCPUID_MMX
  277. // [ 1] - ippCPUID_SSE
  278. // [ 2] - ippCPUID_SSE2
  279. // [ 3] - ippCPUID_SSE3
  280. // [ 4] - ippCPUID_SSSE3
  281. // [ 5] - ippCPUID_MOVBE
  282. // [ 6] - ippCPUID_SSE41
  283. // [ 7] - ippCPUID_SSE42
  284. // [ 8] - ippCPUID_AVX
  285. // [ 9] - ippAVX_ENABLEDBYOS
  286. // [10] - ippCPUID_AES
  287. // [11] - ippCPUID_CLMUL
  288. // [12] - ippCPUID_ABR
  289. // [13] - ippCPUID_RDRAND
  290. // [14] - ippCPUID_F16C
  291. // [15] - ippCPUID_AVX2
  292. // [16] - ippCPUID_ADCOX
  293. // [17] - ippCPUID_RDSEED
  294. // [18] - ippCPUID_PREFETCHW
  295. // [19] - ippCPUID_SHA
  296. // [20:63] - Reserved
  297. //
  298. */
  299. IPPAPI( Ipp64u, ippGetEnabledCpuFeatures, ( void ) )
  300. /* ////////////////////////////////////////////////////////////////////////////
  301. // Name: ippSetCpuFeatures
  302. //
  303. // Purpose: Changes the set of enabled/disabled CPU features.
  304. // This function sets the processor-specific code of the Intel IPP
  305. // library according to the processor features specified in cpuFeatures.
  306. //
  307. // Return:
  308. // ippStsNoErr No errors.
  309. // Warnings:
  310. // ippStsFeatureNotSupported Current CPU doesn't support at least 1 of the
  311. // desired features;
  312. // ippStsUnknownFeature At least one of the desired features is unknown;
  313. // ippStsFeaturesCombination Wrong combination of features;
  314. // ippStsCpuMismatch Indicates that the specified processor features
  315. // are not valid. Previously set code is used.
  316. //
  317. // Arguments:
  318. // cpuFeatures Desired features to support by the library
  319. // (see ippdefs.h for ippCPUID_XX definition)
  320. //
  321. // NOTE: this function can re-initializes dispatcher and after the
  322. // call another library (letter) may work
  323. // CAUTION: At the moment of this function excecution no any other IPP
  324. // function has to be working
  325. //
  326. // The next pre-defined sets of features can be used:
  327. // 32-bit code:
  328. // #define PX_FM ( ippCPUID_MMX | ippCPUID_SSE )
  329. // #define W7_FM ( PX_FM | ippCPUID_SSE2 )
  330. // #define V8_FM ( W7_FM | ippCPUID_SSE3 | ippCPUID_SSSE3 )
  331. // #define S8_FM ( V8_FM | ippCPUID_MOVBE )
  332. // #define P8_FM ( V8_FM | ippCPUID_SSE41 | ippCPUID_SSE42 | ippCPUID_AES | ippCPUID_CLMUL | ippCPUID_SHA )
  333. // #define G9_FM ( P8_FM | ippCPUID_AVX | ippAVX_ENABLEDBYOS | ippCPUID_RDRAND | ippCPUID_F16C )
  334. // #define H9_FM ( G9_FM | ippCPUID_AVX2 | ippCPUID_MOVBE | ippCPUID_ADCOX | ippCPUID_RDSEED | ippCPUID_PREFETCHW )
  335. //
  336. // 64-bit code:
  337. // #define PX_FM ( ippCPUID_MMX | ippCPUID_SSE | ippCPUID_SSE2 )
  338. // #define M7_FM ( PX_FM | ippCPUID_SSE3 )
  339. // #define N8_FM ( S8_FM )
  340. // #define U8_FM ( V8_FM )
  341. // #define Y8_FM ( P8_FM )
  342. // #define E9_FM ( G9_FM )
  343. // #define L9_FM ( H9_FM )
  344. //
  345. */
  346. IPPAPI( IppStatus, ippSetCpuFeatures,( Ipp64u cpuFeatures ))
  347. #if defined (_IPP_STDCALL_CDECL)
  348. #undef _IPP_STDCALL_CDECL
  349. #define __stdcall __cdecl
  350. #endif
  351. #ifdef __cplusplus
  352. }
  353. #endif
  354. #endif /* __IPPCORE_H__ */