sgx_capable.cpp 8.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362
  1. /*
  2. * Copyright 2011-2017 Intel Corporation
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * 1. Redistributions of source code must retain the above copyright notice,
  9. * this list of conditions and the following disclaimer.
  10. *
  11. * 2. Redistributions in binary form must reproduce the above copyright
  12. * notice, this list of conditions and the following disclaimer in the
  13. * documentation and/or other materials provided with the distribution.
  14. *
  15. * 3. Neither the name of the copyright holder nor the names of its
  16. * contributors may be used to endorse or promote products derived from
  17. * this software without specific prior written permission.
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  20. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  21. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  22. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  23. * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  24. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
  25. * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  26. * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  27. * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  28. * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  29. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30. */
  31. #include <sys/stat.h>
  32. #include <sys/types.h>
  33. #include <stdio.h>
  34. #include <unistd.h>
  35. #include <errno.h>
  36. #include <sgx_uae_service.h>
  37. #include <sgx_capable.h>
  38. /* __cpuid(unsinged int info[4], unsigned int leaf, unsigned int subleaf); */
  39. /* Because gcc's __get_cpuid() intrinsic is difficult to work with */
  40. #define __cpuid(x,y,z) asm volatile("cpuid":"=a"(x[0]),"=b"(x[1]),"=c"(x[2]),"=d"(x[3]):"a"(y),"c"(z))
  41. #define EFIFS_PATH "/sys/firmware/efi/"
  42. #define EFIVARS_PATH EFIFS_PATH"efivars/"
  43. #define EFIVAR_EPCBIOS EFIVARS_PATH"EPCBIOS-c60aa7f6-e8d6-4956-8ba1-fe26298f5e87"
  44. #define EFIVAR_EPCSW EFIVARS_PATH"EPCSW-d69a279b-58eb-45d1-a148-771bb9eb5251"
  45. static int _is_sgx_available();
  46. static int _is_cpu_supported();
  47. sgx_status_t sgx_is_capable (int *sgx_capable)
  48. {
  49. struct stat sb;
  50. if ( sgx_capable == NULL ) return SGX_ERROR_INVALID_PARAMETER;
  51. if ( ! _is_cpu_supported() ) {
  52. *sgx_capable= 0;
  53. return SGX_SUCCESS;
  54. }
  55. if ( _is_sgx_available() ) {
  56. *sgx_capable= 1;
  57. return SGX_SUCCESS;
  58. }
  59. /* Check to see if the Software Control Interface is available */
  60. if ( stat(EFIVAR_EPCBIOS, &sb) == -1 ) {
  61. if ( errno == EACCES ) return SGX_ERROR_NO_PRIVILEGE;
  62. *sgx_capable = 0;
  63. return SGX_SUCCESS;
  64. }
  65. *sgx_capable= 1;
  66. return SGX_SUCCESS;
  67. }
  68. sgx_status_t sgx_cap_get_status (sgx_device_status_t *sgx_device_status)
  69. {
  70. struct stat sb;
  71. int has_efifs= 0;
  72. if ( sgx_device_status == NULL ) return SGX_ERROR_INVALID_PARAMETER;
  73. if ( ! _is_cpu_supported() ) {
  74. *sgx_device_status= SGX_DISABLED_UNSUPPORTED_CPU;
  75. return SGX_SUCCESS;
  76. }
  77. if ( _is_sgx_available() ) {
  78. *sgx_device_status= SGX_ENABLED;
  79. return SGX_SUCCESS;
  80. }
  81. /*
  82. * Intel SGX is supported, but not enabled. Figure out what
  83. * it will take to enable it.
  84. */
  85. /* Were we booted in UEFI mode? */
  86. if ( stat(EFIFS_PATH, &sb) == 0 ) {
  87. has_efifs= 1;
  88. if ( stat(EFIVARS_PATH, &sb) == -1 )
  89. {
  90. /* We have /sys/firmware/efi but not efivars */
  91. switch (errno) {
  92. case EACCES:
  93. return SGX_ERROR_NO_PRIVILEGE;
  94. case ENOENT:
  95. case ENOTDIR:
  96. break;
  97. default:
  98. return SGX_ERROR_UNEXPECTED;
  99. }
  100. }
  101. } else {
  102. switch (errno) {
  103. case EACCES:
  104. return SGX_ERROR_NO_PRIVILEGE;
  105. case ENOENT:
  106. case ENOTDIR:
  107. break;
  108. default:
  109. return SGX_ERROR_UNEXPECTED;
  110. }
  111. }
  112. if ( ! has_efifs ) {
  113. /*
  114. * We don't have /sys/firmware/efi mounted. It could have been
  115. * unmounted by the user, or we might not have UEFI support in
  116. * the OS. If /boot/efi exists, then we are probably capable of
  117. * UEFI and should report SGX_DISABLED. Otherwise report
  118. * SGX_DISABLED_LEGACY_OS.
  119. */
  120. if ( stat("/boot/efi", &sb) == 0 ) *sgx_device_status= SGX_DISABLED;
  121. else {
  122. switch(errno) {
  123. case ENOENT:
  124. case ENOTDIR:
  125. *sgx_device_status= SGX_DISABLED_LEGACY_OS;
  126. break;
  127. default:
  128. /*
  129. * We don't have enough information to figure this out
  130. * so report SGX_DISABLED.
  131. */
  132. *sgx_device_status= SGX_DISABLED;
  133. }
  134. }
  135. return SGX_SUCCESS;
  136. }
  137. /*
  138. * We have access to efivars. Now examine the EFI variable for the
  139. * Software Control Interface.
  140. */
  141. if ( stat(EFIVAR_EPCBIOS, &sb) == -1 ) {
  142. if ( errno == EACCES ) return SGX_ERROR_NO_PRIVILEGE;
  143. /* No SCI is present so we can't do a s/w enabled */
  144. *sgx_device_status= SGX_DISABLED_MANUAL_ENABLE;
  145. return SGX_SUCCESS;
  146. }
  147. /*
  148. * Check to see if the software enable has already been
  149. * performed. If so, then we will be enabled on the next
  150. * reboot.
  151. */
  152. if ( stat(EFIVAR_EPCSW, &sb) == -1 ) {
  153. if ( errno == EACCES ) return SGX_ERROR_NO_PRIVILEGE;
  154. /* The software enable hasn't been attempted yet. */
  155. *sgx_device_status= SGX_DISABLED_SCI_AVAILABLE;
  156. return SGX_SUCCESS;
  157. }
  158. /* Software enable has occurred. Need a reboot. */
  159. *sgx_device_status= SGX_DISABLED_REBOOT_REQUIRED;
  160. return SGX_SUCCESS;
  161. }
  162. /* Determine if the CPU supports Intel SGX */
  163. static int _is_cpu_supported()
  164. {
  165. unsigned int info[4];
  166. unsigned int *ebx, *ecx, *edx;
  167. ebx= &info[1];
  168. ecx= &info[2];
  169. edx= &info[3];
  170. /* Is this an Intel CPU? */
  171. __cpuid (info, 0x00, 0);
  172. if ( *ebx != 0x756e6547 || *ecx != 0x6c65746e || *edx != 0x49656e69 )
  173. return 0;
  174. /* Does the CPU support Intel SGX? */
  175. __cpuid (info, 0x07, 0);
  176. return ( *ebx & (0x1<<2) );
  177. }
  178. /* Are SGX instructions available for use? */
  179. static int _is_sgx_available ()
  180. {
  181. unsigned int info[4];
  182. unsigned int *eax, *ebx, *ecx, *edx;
  183. unsigned int subleaf= 2;
  184. unsigned int flag;
  185. eax= &info[0];
  186. ebx= &info[1];
  187. ecx= &info[2];
  188. edx= &info[3];
  189. /* Are Intel SGX instructions available for use? */
  190. __cpuid(info, 0x12, 0);
  191. flag= *eax&0x3;
  192. if ( flag == 0 ) return 0;
  193. /* Do we have non-zero, max enclave sizes? */
  194. if ( (*edx & 0xFFFF) == 0 ) return 0;
  195. /*
  196. * Enumerate the subleafs for the EPC. At least one must be a valid
  197. * subleaf that describes a page.
  198. */
  199. while (1) {
  200. __cpuid(info, 0x12, subleaf);
  201. /*
  202. * Is this an invalid subleaf? If we've hit an invalid subleaf
  203. * before finding a valid subleaf with a non-zero page size,
  204. * then we have no EPC memory allocated, and thus no Intel SGX
  205. * capability.
  206. */
  207. if ( ! (*eax & 0x1) ) return 0;
  208. /*
  209. * Is there a non-zero size for this EPC subleaf? If so, we
  210. * have memory allocated to the EPC for Intel SGX, and are
  211. * enabled.
  212. */
  213. if (
  214. (*eax&0xFFFFF000 || *ebx&0xFFFFF) &&
  215. (*ecx&0xFFFFF000 || *edx&0xFFFFF)
  216. ) return 1;
  217. ++subleaf;
  218. }
  219. /* We'll never get here, but we need to keep the compiler happy */
  220. return 0;
  221. }
  222. sgx_status_t sgx_cap_enable_device (sgx_device_status_t *sgx_device_status)
  223. {
  224. sgx_status_t status;
  225. struct epcbios_stuct {
  226. uint32_t attrs;
  227. uint32_t sprmbins;
  228. uint32_t maxepcsz;
  229. /* There's more, but this is all we need */
  230. } epcbios;
  231. struct epcsw_struct {
  232. uint32_t attrs;
  233. uint32_t maxepcsz;
  234. } epcsw;
  235. FILE *fefivar;
  236. if ( sgx_device_status == NULL ) return SGX_ERROR_INVALID_PARAMETER;
  237. status= sgx_cap_get_status(sgx_device_status);
  238. if ( status != SGX_SUCCESS ) return status;
  239. /*
  240. * If we get back anything other than SGX_DISABLED_SCI_AVAILABLE
  241. * then return, because there is nothing to do.
  242. */
  243. if ( *sgx_device_status != SGX_DISABLED_SCI_AVAILABLE )
  244. return SGX_SUCCESS;
  245. /* Attempt the software enable */
  246. /* First, read the EPCBIOS EFI variable to get the max EPC size */
  247. fefivar= fopen(EFIVAR_EPCBIOS, "r");
  248. if ( fefivar == NULL ) {
  249. if ( errno == EACCES ) return SGX_ERROR_NO_PRIVILEGE;
  250. return SGX_ERROR_UNEXPECTED;
  251. }
  252. /*
  253. * The first 4 bytes are the EFI variable attributes. Data starts
  254. * at offset 0x4, and the value we want is a UINT32 at offset 0x8.
  255. */
  256. if ( fread(&epcbios, sizeof(epcbios), 1, fefivar) != 1 ) {
  257. fclose(fefivar);
  258. return SGX_ERROR_UNEXPECTED;
  259. }
  260. fclose(fefivar);
  261. /*
  262. * Now create the EPCSW EFI variable. The variable data is a
  263. * single UINT32 specifying the requested EPC size.
  264. */
  265. epcsw.attrs= epcbios.attrs;
  266. epcsw.maxepcsz= epcbios.maxepcsz;
  267. fefivar= fopen(EFIVAR_EPCSW, "w");
  268. if ( fefivar == NULL ) {
  269. if ( errno == EACCES ) return SGX_ERROR_NO_PRIVILEGE;
  270. return SGX_ERROR_UNEXPECTED;
  271. }
  272. /* Write out the EPCSW structure */
  273. if ( fwrite(&epcsw, sizeof(epcsw), 1, fefivar) != 1 ) {
  274. unlink(EFIVAR_EPCSW);
  275. fclose(fefivar);
  276. return SGX_ERROR_UNEXPECTED;
  277. }
  278. fclose(fefivar);
  279. *sgx_device_status= SGX_DISABLED_REBOOT_REQUIRED;
  280. return SGX_SUCCESS;
  281. }