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				@@ -767,11 +767,23 @@ circuit_build_times_get_xm(circuit_build_times_t *cbt) 
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				              histogram[nth_max_bin[n]]); 
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				   } 
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				-  /* The following assert is safe, because we don't get called when we 
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				-   * haven't observed at least CBT_MIN_MIN_CIRCUITS_TO_OBSERVE circuits. */ 
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				+  /* bin_counts can become zero if all of our last CBT_NCIRCUITS_TO_OBSERVE 
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				+   * circuits were abandoned before they completed. This shouldn't happen, 
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				+   * though. We should have reset/re-learned a lower timeout first. */ 
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				+  if (bin_counts == 0) { 
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				+    ret = 0; 
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				+    log_warn(LD_CIRC, 
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				+               "No valid circuit build time data out of %d times, %u modes, " 
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				+               "have_timeout=%d, %lfms", cbt->total_build_times, num_modes, 
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				+               cbt->have_computed_timeout, cbt->timeout_ms); 
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				+    goto done; 
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				+  } 
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				+ 
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				   tor_assert(bin_counts > 0); 
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				   ret /= bin_counts; 
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				+ 
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				+ done: 
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				   tor_free(histogram); 
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				   tor_free(nth_max_bin); 
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				@@ -1057,6 +1069,10 @@ circuit_build_times_update_alpha(circuit_build_times_t *cbt) 
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				    * and less frechet-like. */ 
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				   cbt->Xm = circuit_build_times_get_xm(cbt); 
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				+  /* If Xm came back 0, then too many circuits were abandoned. */ 
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				+  if (cbt->Xm == 0) 
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				+    return 0; 
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				+ 
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				   tor_assert(cbt->Xm > 0); 
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				   for (i=0; i< CBT_NCIRCUITS_TO_OBSERVE; i++) { 
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